Load Switch with Level-Shift - vishay.com

1 siliconix S14-1845-Rev. D, 08-Sep-141 Document Number: 67998 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Switch with Level-ShiftMarking Code: IKFEATURES Low RDS(on) TrenchFET : V rated V to 12 V input V to 8 V logic level control Low profile, small footprint TSOP-6 package 2100 V ESD protection on input Switch , VON/OFF Adjustable slew-rate Material categorization: for definitions of compliance please see Load Switch with Level-Shift gate drive Slew-rate control Portable / consumer devicesDESCRIPTIONThe Si3865 DDV includes a p- and n-channel MOSFET in a single TSOP-6 package. The low on-resistance p-channel TrenchFET is tailored for use as a load Switch .

2 The n-channel, with an external resistor, can be used as a Level-Shift to drive the p-channel load- Switch . The n-channel MOSFET has internal ESD protection and can be driven by logic signals as low as V. The Si3865 DDV operates on supply lines from V to 12 V, and can drive loads up to CIRCUITSN otea. Minimum R1 value should be at least 10 x R2 to ensure Q1 turn-on The Si3865 DDV is ideally suited for high-side load switching in portable applications. The integrated n-channel Level-Shift device saves space by reducing external components. The slew rate is set externally so that rise-times can be tailored to different load types. PRODUCT SUMMARYVDS (V)12 RDS(on) ( ) at VIN = V (on) ( ) at VIN = V (on) ( ) at VIN = V (on) ( ) at VIN = V (A) ViewTSOP-61R22D23D2R1, C16ON/OFF5S24 VOUTGNDLOADVINON/OFFR2R212, 3C16465R1Q1Q2 CoCi071421280246810 Time ( s)R2(k )td(off)tftd(on)trIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 FCOMPONENTSR1 Pull-up resistorTypical 10 k to 1 M aR2 Optional slew-rate controlTypical 0 to 100 k aC1 Optional slew-rate controlTypical 1000 siliconix S14-1845-Rev.

3 D, 08-Sep-142 Document Number: 67998 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT BLOCK DIAGRAMN otesa. Surface mounted on FR4 boardb. VIN = 12 V, VON/OFF = 8 V, TA = 25 Cc. Pulse test: pulse width 300 s, duty cycle 2 % Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device INFORMATIONP ackageTSOP-6 Lead (Pb)-free and halogen-freeSi3865 DDV-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TA = 25 C, unless otherwise noted)PARAMETER SYMBOL LIMITUNIT Input voltageVIN(VDS2)

4 12 VOn/off voltageVON/OFF8 Load currentContinuous a, bIL b, c 6 Continuous intrinsic diode conduction aIS-1 Maximum power dissipation junction and storage temperature rangeTJ, Tstg-55 to +150 CESD rating, MIL-STD-883D human body model (100 pF, 1500 )ESD2kVTHERMAL RESISTANCE RATINGSPARAMETER SYMBOL TYPICALMAXIMUMUNIT Maximum junction-to-ambient (continuous current) aRthJA130150 C/WMaximum junction-to-foot (Q2)RthJF7590 SPECIFICATIONS (TJ = 25 C, unless otherwise noted)PARAMETER SYMBOL TEST CONDITIONS Off CharacteristicsReverse leakage currentIFLVIN = 12 V, VON/OFF = 0 V--1 ADiode forward voltageVSDIS = -1 CharacteristicsInput voltage (p-channel) at 1 ARDS(on) VON/OFF = V, ID = 1 AVIN = VIN = = = (p-channel) drain-currentID(on) VIN-OUT V, VIN = 5 V, VON/OFF = V1--AVIN-OUT V, VIN = 3 V, VON/OFF = V1--D2S2ON/OFFR21465Q1Q2Si3865 DDVR1, C12, siliconix S14-1845-Rev.

5 D, 08-Sep-143 Document Number: 67998 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted)Output CharacteristicsVDROP vs. IL at VIN = VVDROP vs. VIN at IL = 1 AVDROP vs. IL at VIN = VVDROP vs. IL at VIN = VNormalized On-Resistance vs. Junction Temperature0 2 3 5 6 Drain Current (A)VDS-Drain-to-Source Voltage (V)VGS= 5 V thru VVGS= 1 VVGS= 0123456 VDROP(V)IL (A)TJ= 25 CTJ= 125 CVON/VOFF = V to 8 (V)VIN-(V)TJ= 125 CTJ= 25 CIL = 1 AVON/OFF = V to 8 0123456 VDROP(V)IL (A)TJ= 25oCTJ= 125oCVON/VOFF = V to 8 0123456 VDROP(V)IL (A)TJ= 25 CTJ= 125 CVON/VOFF = V to 8 -50-250 255075100125150 RDS(on)-On-Resistance(Normalized)TJ- Junction Temperature ( C)VGS= VVGS= VIL = 1 AVON/OFF = V to 8 siliconix S14-1845-Rev.

6 D, 08-Sep-144 Document Number: 67998 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted)On-Resistance vs. Input VoltageSwitching Variation R2 at VIN = V, R1 = 20 k Switching Variation R2 at VIN = V, R1 = 20 k Source-Drain Diode Forward VoltageSwitching Variation R2 at VIN = V, R1 = 20 k Switching Variation R2 at VIN = V, R1 = 300 k (on)-On-Resistance ( )VGS-Gate-to-Source Voltage (V)TJ= 125 CTJ= 25 CIL = 1 AVON/OFF = V to 8 VIL = 1 AVON/OFF = V to 8 V09182736450246810 Time (us)R2(k )IL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 Ftd(off)tftd(on)tr0102030400246810 Time (us)R2(k )td(off)tftd(on)trIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 IS-Source Current (A)VSD-Source-to-Drain Voltage (V)TJ= 150 CTJ= 25 C071421280246810 Time ( s)R2(k )td(off)tftd(on)

7 TrIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 F01302603905206500 20406080100 Time (us)R2(k )td(off)tftd(on)trIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 siliconix S14-1845-Rev. D, 08-Sep-145 Document Number: 67998 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted)Switching Variation R2 at VIN = V, R1 = 300 k Switching Variation R2 at VIN = V, R1 = 300 k Safe Operating Area, Junction-to-FootNormalized Thermal Transient Impedance, Junction-to-AmbientVishay siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations.

8 For related documents such as package/tape drawings, part marking, and reliability data, see 20406080100 Time ( s)R2(k )td(off)tftd(on)trIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 F0601201802403000 20406080100 Time ( s)R2(k )td(off)tftd(on)trIL = 1 AVON/OFF = 3 VCi = 10 FCo = 1 Drain Current (A)VDS-Drain-to-Source Voltage (V)* VGS> minimum VGSat which RDS(on)is specified100 msLimited by RDS(on)*1 msTA= 25 CBVDSS Limited10 ms10 s, 1 sDCSquare Wave Pulse Duration (s)Normalized Effective TransientThermal Cycle = Pulse1001. Duty Cycle, D =2. Per Unit Base = RthJA = 130 C/W3. TJM - TA = PDMZthJA(t)t1t2t1t2 Notes:4. Surface MountedPDMV ishay SiliconixPackage InformationDocument Number: 2 3 Gauge Plane L 5 4 R R C M B A b C Ref Seating Plane -C- Seating Plane A 1 A 2 A -A- D -B- E 1 E L 2 (L 1 ) c 4x 1 4x 1 e e1 1 2 3 6 5 4 C M B A b -B- E 1 E e e1 5-LEAD TSOP 6-LEAD TSOP TSOP: 5/6 LEADJEDEC Part Number: MO-193 CMILLIMETERS INCHES Dim Min Nom Max Min Nom Max A - - A 1 - - A 2 - b c D E E 1 e BSC BSC e 1 L - - L 1 Ref Ref L 2 BSC BSC R - - - - 0 4 8 0 4 8 1 7 Nom 7 Nom ECN: C-06593-Rev.

9 I, 18-Dec-06 DWG: 5540 AN823 vishay SiliconixDocument Number: LITTLE FOOTR TSOP-6 Power MOSFETsSurface mounted power MOSFET packaging has been based onintegrated circuit and small signal packages. Those packageshave been modified to provide the improvements in heat transferrequired by power MOSFETs. Leadframe materials and design,molding compounds, and die attach materials have beenchanged. What has remained the same is the footprint of basis of the pad design for surface mounted power MOSFETis the basic footprint for the package. For the TSOP-6 packageoutline drawing see and for the minimum pad converting the footprint to the pad set for a power MOSFET, youmust remember that not only do you want to make electricalconnection to the package, but you must made thermal connectionand provide a means to draw heat from the package, and move itaway from the the case of the TSOP-6 package, the electrical connections arevery simple.

10 Pins 1, 2, 5, and 6 are the drain of the MOSFET andare connected together. For a small signal device or integratedcircuit, typical connections would be made with traces that inches wide. Since the drain pins serve the additionalfunction of providing the thermal connection to the package, thislevel of connection is inadequate. The total cross section of thecopper may be adequate to carry the current required for theapplication, but it presents a large thermal impedance. Also, heatspreads in a circular fashion from the heat source. In this case thedrain pins are the heat sources when looking at heat spread on thePC 1 shows the copper spreading recommended footprint forthe TSOP-6 package. This pattern shows the starting point forutilizing the board area available for the heat spreading copper.