Transcription of Part Number Decoder for Toshiba NAND Flash - …
1 part Number part Number Decoder Decoder for for Toshiba nand . Toshiba nand Flash Flash Revision Memory Application Engineering Dept. Memory Division, Toshiba CORPORATION Semiconductor Company '2010. Copyright 2006, Toshiba Corporation. MFOPR-916, '2010 1. part Number Decoder ~ Raw nand ~. This rule is available for 56nm, 43nm, 32nm and 24nm NANDs. MFOPR-916, '2010 2. P/N Decoder for Raw nand ( Large Block ) ~Definition Memory Density Type of nand Organization Flash I/F Package Type Package size TH58 NVG7D2 FTA00xxx Voltage Type Mode Additional code*. Symbol Mono/Stack Design Rule TC58 Single Chip TH58 Multi Chip Cell Level * part Number on datasheet is not including additional code.
2 Additional code use for Toshiba internal production control. MFOPR-916, '2010 3. P/N Decoder for Raw nand ( Large Block ) ~Details-1. This rule is available for 56nm, 43nm, 32nm and 24nm NANDs TH58 NVG7D2 FTA00xxx Symbol Density M8 256(=28 ) Mbits =32MB. Symbol Vcc VccQ. M9 512(=29 ) Mbits =64MB. V - G0 1(=20 ) Gbits =128MB. Y - G1 2(=21 ) Gbits =256MB. A G2 4(=22 ) Gbits =512MB. B to G3 8(=23 ) Gbits =1GB. D or or G4 16(=24 ) Gbits =2GB. GA 24 Gbits =3GB. G5 5. 32(=2 ) Gbits =4GB. Symbol TYPE of nand I/F. GB 48 Gbits =6GB. N nand 6. G6 64(=2 ) Gbits =8GB. D nand *1. GC 96 Gbits =12GB.
3 T Toggle mode nand 7. G7 128(=2 ) Gbits =16GB. *1: Unique character for product variety control. GD 192 Gbits =24GB. G8 8. 256(=2 ) Gbits =32GB. GE 384 Gbits =48GB. G9 9. 512(=2 ) Gbits =64GB. GF 768 Gbits =96GB. T0 0. 1(=2 ) Tbits =128GB. T1 2(=21 ) Tbits =256GB. MFOPR-916, '2010 4. P/N Decoder for Raw nand ( Large Block ) ~Details-2. This rule is available for 56nm, 43nm, 32nm and 24nm NANDs TH58 NVG7D2 FTA00xxx Symbol Cell Level Symbol Page Block Symbol Design Rule S / H*1 2 Level( 1 bits/cell ) x8 x16 Size Size A 130 nm D / E*1 4 Level( 2 bits/cell ) 0 5 4KB 256KB B 90 nm T / U*1 8 Level( 3 bits/cell ) 1 6 4KB 512KB C 70 nm *1: Unique character for product 2 7 >4KB >512KB D 56 nm variety control.
4 3 8 2KB 128KB E 43 nm 4 9 2KB 256KB F 32nm G 24nm A-type H 24nm B-type MFOPR-916, '2010 5. P/N Decoder for Raw nand ( Large Block ) ~Details-3. This rule is available for 56nm, 43nm, 32nm and 24nm NANDs TH58 NVG7D2 FTA00xxx Lead Halogen Symbol # of PKG Symbol Channel Note Free Free Normal I-ver. /CE. FT No No 0 I Single 1 TSOP, BGA. TSOP TG*1 Yes No 2 K Single 2 TSOP, BGA. TA Yes Yes 4 M Dual 2 LGA. XB No No 7 R Single 4 TSOP PoP. BGA XG*1 Yes No 8 S Single / Dual 4 TSOP, BGA,LGA. BA Yes Yes A U Single / Dual 6 TSOP, BGA,LGA. - No No B V Single / Dual 8 TSOP, BGA,LGA. LGA XL*1 Yes No LA Yes Yes *1: Some of the product are Halogen Free with this code.
5 If necessary, Please ask to Toshiba . MFOPR-916, '2010 6. P/N Decoder for Raw nand ( Large Block ) ~Details-4. This rule is available for 56nm, 43nm, 32nm and 24nm NANDs TH58 NVG7D2 FTA00xxx Symbol TSOP [mm] LGA [mm] BGA [mm]. 0 12 x 20 x Reserved General code( , 14x18, 12x18 ). 1 Reserved 40 lands, 12 x 18 x 224 balls, *1. 2 Reserved 40 lands, 12 x 18 x 224 balls, *1. 3 Reserved 40 lands, 12 x 17 x 60 balls, x 13. 4 Reserved 40 lands, 12 x 17 x 60 balls, 9 x 11. 5 Reserved 40 lands, 12 x 17 x 60 balls, 10 x 13. 6 Reserved 40 lands, 13 x 17 x 60 balls, x 13 *1. 7 Reserved 52 lands, 14 x 18 x 60 balls, 9 x 11 *1.
6 8 Reserved 52 lands, 14 x 18 x 60 balls, 10 x 13 *1. 9 Reserved 52 lands, 14 x 18 x 132 balls( Toggle ), A Reserved 52 lands, 12 x 17 x 132 balls( Toggle ), B 12 x 18 x *1 52 lands, 12 x 17 x 224 balls, C Reserved 52 lands, - D Reserved 132 lands( Toggle ) - *1: Unique character for product variety control. MFOPR-916, '2010 7. part Number Decoder ~ nand with Controller ~. MFOPR-916, '2010 8. P/N Decoder for nand w/ controller ~Definition Memory Density nand Interface Number of stacked chip/Package Type of Flash Package Type Package size THGBM2G9 DBFBAI2xxx Toshiba Mode Add.
7 Code Memory IC Design Rule Voltage Type Cell Level Controller Revision( Unique code ). * part Number on datasheet is not including additional code. Additional code use for Toshiba internal production control. MFOPR-916, '2010 9. P/N Decoder for nand w/ controller ~Details-1. THGBM2G9 DBFBAI2xxx Symbol Type Symbol Type Symbol Density G IC. M eMMC M8 256(=28 ) Mbits =32MB. D Module N nand M9 512(=29 ) Mbits =64MB. R PBA- nand G0 1(=20 ) Gbits =128MB. Symbol Vcc VccQ S eSD G1 2(=21 ) Gbits =256MB. U USB G2 4(=22 ) Gbits =512MB. V - B G3 8(=23 ) Gbits =1GB. Y - G4 16(=24 ) Gbits =2GB.
8 C. A D GA 24 Gbits =3GB. B or Others G5 32(=25 ) Gbits =4GB. H. D or or W GB 48 Gbits =6GB. X G6 64(=26 ) Gbits =8GB. GC 96 Gbits =12GB. G7 128(=27 ) Gbits =16GB. GD 192 Gbits =24GB. G8 8. 256(=2 ) Gbits =32GB. GE 384 Gbits =48GB. G9 9. 512(=2 ) Gbits =64GB. GF 768 Gbits =96GB. T0 0. 1(=2 ) Tbits =128GB. T1 2(=21 ) Tbits =256GB. MFOPR-916, '2010 10. P/N Decoder for nand w/ controller ~Details-2. THGBM2G9 DBFBAI2xxx Symbol Cell Level Symbol Design Rule Symbol Stacked die Normal version 2 Level 0. S 1~9 1~9die ( 0oC~70oC ). ( 1 bits/cell ). 4 Level A 12die Industrial version D I.
9 ( 2 bits/cell ) B 16die ( - 25oC or - 40oC~85oC ). 8 Level T. ( 3bits/cell ). Symbol Design Rule PKG Symbol Lead Free Halogen Free A 130 nm FT No No B 90 nm TSOP TG* Yes No C 70 nm TA Yes Yes D 56 nm XB No No E 43 nm BGA XG* Yes No F 32nm BA Yes Yes G 24nm A-type - No No H 24nm B-type LGA XL* Yes No LA Yes Yes *Some of the product are Halogen Free with this code. If necessary, Please ask to Toshiba . MFOPR-916, '2010 11. P/N Decoder for nand w/ controller ~Details-3. THGBM2G9 DBFBAI2xxx Symbol TSOP [mm] LGA [mm] BGA [mm]. 0 12 x 20 x 12 x 18 x 12 x 18 x 1 Reserved Reserved 12 x 18 x 2 Reserved 14 x 18 x 14 x 18 x 3 Reserved Reserved 14 x 18 x 6 Reserved Reserved 14 x 18 x 8 Reserved 14 x 18 x x 13 x 9 Reserved 14 x 18 x 12 x 16 x B Reserved Reserved 12 x 16 x E Reserved Reserved 12 x 16 x *1.
10 F Reserved Reserved 17 x 22 x *1. G Reserved Reserved x 13 x *1. H Reserved Reserved 12 x 16 x *1. I Reserved Reserved 14 x 18 x *1. J Reserved Reserved 14 x 18 x *1. K Reserved Reserved 14 x 18 x *2. *1: OSP=Organic Solderability Preservatives. *2: Package internal structure optimization. MFOPR-916, '2010 12. Change History for part Number Decoder Revision Released Date Note '2008 is released. '2008 To add P/N of nand with controller '2008 Page 5 # of CE for LGA 1 1 / 2. Page 9 Lower Temp. coverage : -40oC -25oC or -40oC. '2010 To add new P/N rule MFOPR-916, '2010 13. RESTRICTIONS ON PRODUCT USE.
