Performance Optimization and Tuning Techniques …

1 Front cover Performance Optimization and Tuning Techniques for IBM power Systems Processors Including ibm power8 . Peter Bergner Bernard King Smith Brian Hall Julian Wang Alon Shalev Housfater Suresh Warrier Madhusudanan Kandasamy David Wendt Tulio Magno Alex Mericas Steve Munroe Mauricio Oliveira Bill Schmidt Will Schmidt Redbooks International Technical Support Organization Performance Optimization and Tuning Techniques for IBM power Systems Processors Including IBM. power8 . August 2015. SG24-8171-01. Note: Before using this information and the product it supports, read the information in Notices on page ix. Second Edition (August 2015). This edition pertains to IBM power Systems servers based on IBM power Systems processor-based technology, including but not limited to ibm power8 processor-based systems.

2 Specific software levels and firmware levels that are used are noted throughout the text. Copyright International Business Machines Corporation 2014, 2015. All rights reserved. Note to Government Users Restricted Rights -- Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Notices .. ix Trademarks ..x IBM Redbooks promotions .. xi Preface .. xiii Authors .. xiii Now you can become a published author, too! .. xvii Comments welcome.. xvii Stay connected to IBM Redbooks .. xvii Summary of changes .. xix August 2015, Second Edition .. xix Chapter 1. Optimization and Tuning on ibm power8 processor-based systems.

3 1. Introduction .. 2. Outline of this guide .. 2. Conventions that are used in this guide .. 5. Background .. 5. Optimizing Performance on power8 processor-based systems.. 6. Lightweight Tuning and Optimization guidelines.. 7. Deployment guidelines .. 15. Deep Performance Optimization guidelines .. 21. Chapter 2. The ibm power8 processor .. 25. Introduction to the power8 processor .. 26. Using power8 features .. 28. Multi-core and multi-thread .. 28. Multipage size support (page sizes (4 KB, 64 KB, 16 MB, and 16 GB)) .. 32. Efficient use of cache and memory .. 33. Transactional memory.. 42. Vector Scalar eXtension .. 45. Decimal floating point.

4 47. In-core cryptography and integrity enhancements .. 47. On-chip accelerators .. 48. Storage synchronization (sync, lwsync, lwarx, stwcx., and eieio) .. 49. Fixed-point load and store quadword instructions.. 51. Instruction fusion .. 51. Event-based branches (or user-level fast interrupts) .. 52. power management and system Performance .. 52. Coherent Accelerator Processor Interface .. 53. I/O adapter affinity .. 55. Related publications .. 55. Chapter 3. The IBM power Hypervisor .. 57. Introduction to PowerVM .. 58. power Systems virtualization with PowerVM .. 59. Virtual processors .. 59. Page table sizes for LPARs .. 63. Copyright IBM Corp.

5 2014, 2015. All rights reserved. iii Placing LPAR resources to attain higher memory affinity .. 63. Active memory expansion .. 66. Optimizing resource placement: Dynamic Platform Optimizer .. 67. Partition compatibility mode .. 67. Introduction to KVM Virtualization .. 67. Related publications .. 68. Chapter 4. IBM AIX .. 71. Introduction .. 72. Using power Architecture features with AIX .. 72. Multi-core and multi-thread .. 72. Multipage size support on AIX .. 83. Efficient use of cache .. 86. Transactional memory.. 89. Vector Scalar eXtension .. 91. Decimal floating point .. 92. On-chip encryption accelerator .. 94. AIX operating system-specific optimizations.

6 95. Malloc .. 95. Pthread tunables .. 97. pollset .. 98. File system Performance benefits .. 98. Direct I/O .. 98. Concurrent I/O .. 99. Asynchronous I/O .. 99. I/O completion ports .. 100. shmat versus mmap .. 100. Large segment tunable aliasing (LSA) .. 101. 64-bit versus 32-bit ABIs .. 101. Sleep and wake-up primitives (thread_wait and thread_post) .. 102. Shared versus private loads .. 103. Workload partition shared licensed program installations.. 104. AIX preferred practices .. 105. AIX preferred practices that are applicable to all power Systems generations.. 105. AIX preferred practices that are applicable to POWER7 and power8 . processor-based systems.

7 106. Related publications .. 107. Chapter 5. IBM i .. 111. Introduction .. 112. Using power features with IBM i .. 112. Multi-core and multi-thread .. 112. Multipage size support on IBM i .. 113. Vector Scalar eXtension .. 113. Decimal floating point .. 113. IBM i operating system-specific optimizations.. 114. IBM i advanced Optimization Techniques .. 114. Performance management on IBM i .. 115. Related publications .. 116. Chapter 6. Linux .. 117. Introduction .. 118. Using power features with Linux .. 118. Multi-core and multi-thread .. 119. iv Performance Optimization and Tuning Techniques for IBM power Systems Processors Including ibm power8 .

8 Multipage size support on Linux .. 123. Efficient use of cache .. 123. Transactional memory.. 124. Vector Scalar eXtension .. 125. Decimal floating point .. 126. Event-based branches .. 128. Linux operating system-specific optimizations .. 129. GCC, toolchain, and IBM Advance Toolchain.. 129. Tuning and optimizing malloc .. 133. Large TOC -mcmodel=medium Optimization .. 137. POWER7 based distro considerations .. 137. Microthreading considerations .. 137. Little Endian .. 138. Application binary interface .. 139. Related publications .. 139. Chapter 7. Compilers and Optimization tools for C, C++, and Fortran.. 141. Compiler versions and Optimization levels.

9 142. Advanced compiler Optimization Techniques .. 143. Common prerequisites .. 143. XL compiler family.. 144. GCC compiler family .. 146. Capitalizing on power8 features with the XL and GCC compilers .. 148. In-core cryptography .. 148. Compiler support for Vector Scalar eXtension .. 151. Built-in functions for storage synchronization .. 154. Data Streams Control Register controls .. 154. Transactional memory.. 156. IBM Feedback Directed Program Restructuring .. 160. Introduction .. 160. Feedback Directed Program Restructuring supported environments .. 162. Acceptable input formats .. 162. General operation .. 162. Instrumentation and profiling.

10 164. Optimization .. 165. Using the Advance Toolchain with IBM XLC and XLF .. 169. Using GPU accelerators with C/C++ .. 169. Related publications .. 171. Chapter 8. Java .. 173. Java levels .. 174. 32-bit versus 64-bit Java .. 174. Little Endian support .. 175. Memory and page size considerations .. 175. Medium and large pages for Java heap and code cache .. 175. Configuring large pages for Java heap and code cache.. 176. Prefetching .. 176. Compressed references .. 177. JIT code cache .. 180. Shared classes .. 181. Capitalizing on power8 features with IBM Java.. 181. In-core Advanced Encryption Standard and Secure Hash Algorithm acceleration and instructions.