Power MOSFET - Vishay

1 IRFPC60, SiHFPC60. Vishay Siliconix Power MOSFET . FEATURES. PRODUCT SUMMARY Dynamic dV/dt Rating VDS (V) 600. Repetitive Avalanche Rated Available RDS(on) ( ) VGS = 10 V Isolated Central Mounting Hole RoHS*. Qg (Max.) (nC) 210 COMPLIANT. Fast Switching Qgs (nC) 26. Ease of Paralleling Qgd (nC) 110. Simple Drive Requirements Configuration Single Compliant to RoHS Directive 2002/95/EC. D. DESCRIPTION. TO-247AC Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and G cost-effectiveness. The TO-247AC package is preferred for commercial-industrial applications where higher Power levels S preclude the use of TO-220AB devices. The TO-247AC is D. G S similar but superior to the earlier TO-218 package because of N-Channel MOSFET its isolated mounting hole. It also provides greater creepage distance between pins to meet the requirements of most safety specifications.

2 ORDERING INFORMATION. Package TO-247AC. IRFPC60 PbF. Lead (Pb)-free SiHFPC60-E3. IRFPC60. SnPb SiHFPC60. ABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwise noted). PARAMETER SYMBOL LIMIT UNIT. Drain-Source Voltage VDS 600. V. Gate-Source Voltage VGS 20. TC = 25 C 16. Continuous Drain Current VGS at 10 V ID. TC = 100 C 10 A. Pulsed Drain Currenta IDM 64. Linear Derating Factor W/ C. Single Pulse Avalanche Energyb EAS 1000 mJ. Repetitive Avalanche Currenta IAR 16 A. Repetitive Avalanche Energya EAR 28 mJ. Maximum Power Dissipation TC = 25 C PD 280 W. Peak Diode Recovery dV/dtc dV/dt V/ns Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150. C. Soldering Recommendations (Peak Temperature) for 10 s 300d 10 lbf in Mounting Torque 6-32 or M3 screw N m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 C, L = mH, Rg = 25 , IAS = 16 A (see fig.)

3 12). c. ISD 16 A, dI/dt 140 A/ s, VDD VDS, TJ 150 C. d. mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91245 S11-0442-Rev. B, 14-Mar-11 1. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix THERMAL RESISTANCE RATINGS. PARAMETER SYMBOL TYP. MAX. UNIT. Maximum Junction-to-Ambient RthJA - 40. Case-to-Sink, Flat, Greased Surface RthCS - C/W. Maximum Junction-to-Case (Drain) RthJC - SPECIFICATIONS (TJ = 25 C, unless otherwise noted). PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT. Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 A 600 - - V. VDS Temperature Coefficient VDS/TJ Reference to 25 C, ID = 1 mA - 830 - mV/ C. Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 A - V. Gate-Source Leakage IGSS VGS = 20 V - - 100 nA.

4 VDS = 600 V, VGS = 0 V - - 100. Zero Gate Voltage Drain Current IDSS A. VDS = 480 V, VGS = 0 V, TJ = 125 C - - 500. Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = Ab - - . Forward Transconductance gfs VDS = 50 V, ID = Ab 13 - - S. Dynamic Input Capacitance Ciss - 3900 - VGS = 0 V, Output Capacitance Coss VDS = 25 V, - 440 - pF. f = MHz, see fig. 5. Reverse Transfer Capacitance Crss - 98 - Total Gate Charge Qg - - 210. ID = 16 A, VDS = 360 V, Gate-Source Charge Qgs VGS = 10 V - - 26 nC. see fig. 6 and 13b Gate-Drain Charge Qgd - - 110. Turn-On Delay Time td(on) - 19 - Rise Time tr VDD = 300 V, ID = 16 A, - 54 - Rg = , RD= 18 ns Turn-Off Delay Time td(off) - 110 - see fig. 10b Fall Time tf - 56 - Between lead, D. Internal Drain Inductance LD - - 6 mm ( ") from package and center of G. nH. Internal Source Inductance LS die contact - 13 - S. Drain-Source Body Diode Characteristics MOSFET symbol Continuous Source-Drain Diode Current IS D.

5 - - 16. showing the A. integral reverse G. Pulsed Diode Forward Currenta ISM p - n junction diode S - - 64. Body Diode Voltage VSD TJ = 25 C, IS = 16 A, VGS = 0 Vb - - V. Body Diode Reverse Recovery Time trr TJ = 25 C, IF = 16 A, - 610 920 ns Body Diode Reverse Recovery Charge Qrr dI/dt = 100 A/ sb - C. Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD). Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. Document Number: 91245. 2 S11-0442-Rev. B, 14-Mar-11. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix TYPICAL CHARACTERISTICS (25 C, unless otherwise noted). Fig. 1 - Typical Output Characteristics, TC = 25 C Fig. 3 - Typical Transfer Characteristics Fig.

6 2 - Typical Output Characteristics, TC = 150 C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91245 S11-0442-Rev. B, 14-Mar-11 3. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91245. 4 S11-0442-Rev. B, 14-Mar-11. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix RD. VDS. VGS. RG. +. - VDD. 10 V. Pulse width 1 s Duty factor %. Fig. 10a - Switching Time Test Circuit VDS. 90 %. 10 %. VGS.

7 Td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91245 S11-0442-Rev. B, 14-Mar-11 5. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix L. VDS VDS. Vary tp to obtain tp required IAS. VDD. RG +. V DD. - VDS. IAS. 10 V. tp . IAS. Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as QG 50 k . 10 V 12 V F. F. QGS QGD +. VDS. - VG. VGS. 3 mA. Charge IG ID. Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit Document Number: 91245. 6 S11-0442-Rev. B, 14-Mar-11.

8 This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT IRFPC60, SiHFPC60. Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer - +. - +. - Rg dV/dt controlled by Rg +. Driver same type as VDD. - ISD controlled by duty factor D . - device under test Driver gate drive Period D=. Period VGS = 10 Va lSD waveform Reverse recovery Body diode forward current current dI/dt VDS waveform Diode recovery dV/dt VDD. Re-applied voltage Body diode forward drop Inductor current Ripple 5 % ISD. Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations.

9 For related documents such as package/tape drawings, part marking, and reliability data, see Document Number: 91245 S11-0442-Rev. B, 14-Mar-11 7. This datasheet is subject to change without notice. THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Package Information Vishay Siliconix TO-247AC (High Voltage). A A. 4. E 7 P (Datum B). B. E/2 S A2 k M DBM. 3 R/2 P1. A. D2. Q. 4 4. 2xR. D D1. (2). 1 2 3 D 4. Thermal pad 5 L1. C L 4. E1. See view B A. M D B M. 2 x b2 C View A - A. 2x e 3xb b4 A1. M C A M. (b1, b3, b5). Planting Base metal Lead Assignments 1. Gate D DE E. 2. Drain 3. Source (c) c1. C C. 4. Drain (b, b2, b4). (4). Section C - C, D - D, E - E. View B. MILLIMETERS INCHES MILLIMETERS INCHES. DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A D2 A1 E A2 E1 - - b e BSC BSC. b1 k b2 L b3 L1 b4 N BSC BSC. b5 P c P1 - - c1 Q D R D1 - - S BSC BSC.

10 ECN: X13-0103-Rev. D, 01-Jul-13. DWG: 5971. Notes 1. Dimensioning and tolerancing per ASME 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed mm ( ") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. P to have a maximum draft angle of to the top of the part with a maximum hole diameter of mm ( "). 7. Outline conforms to JEDEC outline TO-247 with exception of dimension c. 8. Xian and Mingxin actually photo. Revision: 01-Jul-13 1 Document Number: 91360. For technical questions, contact: THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Legal Disclaimer Notice Vishay Disclaimer . ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE.