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Raphael NXT User Guide - www-eng.lbl.gov

Raphael NXTUser GuideVersion , March 2006iiRaphael NXT User Notice and Proprietary InformationCopyright 2006 Synopsys, Inc. All rights reserved. This software and documentation contain confidential and proprietary information that is the property of Synopsys, Inc. The software and documentation are furnished under a license agreement and may be used or copied only in accordance with the terms of the license agreement. No part of the software and documentation may be reproduced, transmitted, or translated, in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without prior written permission of Synopsys, Inc., or as expressly provided by the license to Copy DocumentationThe license agreement with Synopsys permits licensee to make copies of the documentation for its internal use only.

Raphael NXT can extract capacitance of nets in large designs to better than 1% accurate. Raphael NXT ca n be used by itself (standalone mode)

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Transcription of Raphael NXT User Guide - www-eng.lbl.gov

1 Raphael NXTUser GuideVersion , March 2006iiRaphael NXT User Notice and Proprietary InformationCopyright 2006 Synopsys, Inc. All rights reserved. This software and documentation contain confidential and proprietary information that is the property of Synopsys, Inc. The software and documentation are furnished under a license agreement and may be used or copied only in accordance with the terms of the license agreement. No part of the software and documentation may be reproduced, transmitted, or translated, in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without prior written permission of Synopsys, Inc., or as expressly provided by the license to Copy DocumentationThe license agreement with Synopsys permits licensee to make copies of the documentation for its internal use only.

2 Each copy shall include all copyrights, trademarks, service marks, and proprietary rights notices, if any. Licensee must assign sequential numbers to all copies. These copies shall contain the following legend on the cover page: This document is duplicated with the permission of Synopsys, Inc., for the exclusive use of _____ and its employees. This is copy number _____. Destination Control StatementAll technical data contained in this publication is subject to the export control laws of the United States of America. Disclosure to nationals of other countries contrary to United States law is prohibited. It is the reader s responsibility to determine the applicable regulations and to comply with , INC., AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR Trademarks ( )Synopsys, AMPS, Arcadia, C Level Design, C2 HDL, C2V, C2 VHDL, Cadabra, Calaveras Algorithm, CATS, CRITIC, CSim, Design Compiler, DesignPower, DesignWare, EPIC, Formality, HSIM, HSPICE, Hypermodel, iN-Phase, in-Sync, Leda, MAST, Meta, Meta-Software, ModelTools, NanoSim, OpenVera, PathMill, Photolynx, Physical Compiler, PowerMill, PrimeTime, RailMill, RapidScript, Saber, SiVL, SNUG, SolvNet, Superlog, System Compiler, TetraMAX, TimeMill, TMA, VCS, Vera, and Virtual Stepper are registered trademarks of Synopsys, ( )

3 Active Parasitics, AFGen, Apollo, Apollo II, Apollo-DPII, Apollo-GA, ApolloGAII, Astro, Astro-Rail, Astro-Xtalk, Aurora, AvanTestchip, AvanWaves, BCView, Behavioral Compiler, BOA, BRT, Cedar, ChipPlanner, Circuit Analysis, Columbia, Columbia-CE, Comet 3D, Cosmos, CosmosEnterprise, CosmosLE, CosmosScope, CosmosSE, Cyclelink, Davinci, DC Expert, DC Expert Plus, DC Professional, DC Ultra, DC Ultra Plus, Design Advisor, Design Analyzer, Design Vision, DesignerHDL, DesignTime, DFM-Workbench, Direct RTL, Direct Silicon Access, Discovery, DW8051, DWPCI, Dynamic-Macromodeling, Dynamic Model Switcher, ECL Compiler, ECO Compiler, EDAnavigator, Encore, Encore PQ, Evaccess, ExpressModel, Floorplan Manager, Formal Model Checker, FoundryModel, FPGA Compiler II, FPGA Express, Frame Compiler, Galaxy, Gatran, HANEX, HDL Advisor, HDL Compiler, Hercules, Hercules-Explorer, Hercules-II, Hierarchical Optimization Technology, High Performance Option, HotPlace, HSIM plus, HSPICE-Link, iN-Tandem, Integrator, Interactive Waveform Viewer, i-Virtual Stepper, Jupiter, Jupiter-DP, JupiterXT, JupiterXT-ASIC, JVXtreme, Liberty, Libra-Passport, Library Compiler, Libra-Visa, Magellan, Mars, Mars-Rail, Mars-Xtalk, Medici, Metacapture, Metacircuit, Metamanager, Metamixsim, Milkyway, ModelSource, Module Compiler, MS-3200, MS-3400, Nova Product Family, Nova-ExploreRTL, Nova-Trans, Nova-VeriLint, Nova-VHDL lint, Optimum Silicon, Orion_ec, Parasitic View, Passport, Planet, Planet-PL, Planet-RTL, Polaris, Polaris-CBS, Polaris-MT, Power Compiler, PowerCODE, PowerGate, ProFPGA, ProGen, Prospector.

4 Protocol Compiler, PSMGen, Raphael , Raphael -NES, RoadRunner, RTL Analyzer, Saturn, ScanBand, Schematic Compiler, Scirocco, Scirocco-i, Shadow Debugger, Silicon Blueprint, Silicon Early Access, SinglePass-SoC, Smart Extraction, SmartLicense, SmartModel Library, Softwire, Source-Level Design, Star, Star-DC, Star-MS, Star-MTB, Star-Power, Star-Rail, Star-RC, Star-RCXT, Star-Sim, Star-SimXT, Star-Time, Star-XP, SWIFT, Taurus, TimeSlice, TimeTracker, Timing Annotator, TopoPlace, TopoRoute, Trace-On-Demand, True-Hspice, TSUPREM-4, TymeWare, VCS Express, VCSi, Venus, Verification Portal, VFormal, VHDL Compiler, VHDL System Simulator, VirSim, and VMC are trademarks of Synopsys, Marks (SM)MAP-in, SVP Caf , and TAP-in are service marks of Synopsys, is a trademark of the Open SystemC Initiative and is used under and AMBA are registered trademarks of ARM other product or company names may be trademarks of their respective owners.

5 Raphael NXT User This Manual ..xvConventions ..xviCustomer Support ..xviiAccessing SolvNet ..xviiContacting the Synopsys Technical Support Center ..xviiiAcknowledgments .. Started ..1 Raphael NXT Distribution Contents ..1 Using Raphael NXT ..2 Viewing Design Files ..5 General Specifications ..6 Theory of Operation ..6 Files and IO ..11 Files ..11 Outputs..11 Geometry and Coordinates ..12 Dielectric Boxes ..13 Metal Boxes (Conductors) ..13 Trapezoidal Conductors ..14 Raphael NXT Conductor Types ..15 Net ..15 Misc ..17 Ground ..17 Device Layers ..17 Device Layers and -exclude_devices ..18ivRaphael NXT User Nets ..18 Capacitance Types..20 Boundary Conditions ..21 Accuracy and Runtime..21 Effect of grids_per_meter Specification ..23 Greens Function Calculation ..23 Fundamentals of Resistance Extraction in Raphael NXT.

6 24 Barrier Layer Support..25 Trapezoidal Cross Sections ..25 Using Resistance Extraction ..26 Limitations of Resistance Extraction ..27 Example ..28 References.. Files ..31 Input Files ..31 Technology File ..32 Command Format ..32 Tokens ..32 Technology File Example ..33 Technology File Guidelines..33 Advanced Technology File Examples ..35 More Technology File Examples..37 Design File ..39 Design File Examples..41 Output Reports ..43 Capacitance Report ..44 Capacitance Matrix ..45 SPICE Style Output ..45 Input Specification for Resistance Extraction..46 Technology File ..46 Example ..47 Design File ..47 Contact File ..47 Contact/Node Specification ..47 Port Specification ..48 Distributed RC Specification ..48 Raphael NXT User ..49 Automatically Configuring Server and Clients.

7 50MP Based Extraction with Raphael NXT ..52 Cleaning up after Extractions ..52MP Licensing ..53 Manually Starting the Server and Clients..53 Example ..53 Adding MP Clients ..54 Example ..55alias ..55 Name ..55 Syntax ..55assert ..55 Name ..55 Syntax ..56 Arguments ..56build_gf_tables ..56 Name ..56 Syntax ..56 Arguments ..57 Description ..57 Examples ..58 See Also..58ctrlc ..59 Name ..59 Syntax ..59exclude..59 Name ..59 Syntax ..59 Arguments..59 Description ..59 Example ..60 See Also..60extract ..60viRaphael NXT User ..60 Syntax ..60 Arguments ..60 GLOB Expression Syntax ..61 Description ..61 Examples ..62 See Also..63field ..63 Name ..63 Syntax ..63help ..63 Name ..63 Syntax ..64import..64 Name ..64 Syntax ..64init_extract ..64 Name ..64 Syntax ..64 Arguments ..65 Description.

8 66 Examples ..67 See Also..67plot_tech ..67 Name ..67 Syntax ..68 Arguments..68 Description ..68 Example ..68 See Also..69print_capacitance_matrix ..69 Name ..69 Syntax ..69 Arguments ..69 DESCRIPTION..70 Examples ..70 See Also..71 Raphael NXT User ..71 Name ..71 Syntax ..71 Arguments ..72 Description ..72 Examples ..73 See Also..73print_mp_info ..73 Name ..73 Syntax ..74 Description ..74 Examples ..74print_param ..75 Name ..75 Syntax ..75 Description ..75 Examples ..75print_rc_report ..76 Name ..76 Syntax ..76 Description ..76 Example ..76 See Also..77print_resistance_report ..77 Name ..77 Syntax ..77 Arguments ..77 Description ..77 Examples ..78 See Also..78printf ..78 Name ..78 Syntax ..78quit ..78 Name ..78 Syntax ..78read_contact ..79viiiRaphael NXT User ..79 Syntax.

9 79 Arguments ..79 DESCRIPTION..79 Example ..80 See Also..80read_gf_tables ..80 Name ..80 Syntax ..80 Arguments ..80 Description ..81 Examples ..81 See Also..81read_design ..81 Name ..81 Syntax ..82 Arguments ..82 Description ..84 Examples ..84 See Also..85read_state ..85 Name ..85 Syntax ..85 Arguments ..85 Description ..85 Examples ..86 See Also..86read_tech ..86 Name ..86 Syntax ..86 Arguments ..86 Description ..87 Examples ..87 See Also..87resistance_extract ..87 Name ..87 Syntax ..87 Raphael NXT User Arguments..88 Description ..88 Examples ..89set ..89 Name ..89 Syntax ..89 Description ..89 Examples ..90set_boundary_box ..90 Name ..90 Syntax ..90 Arguments ..90 Description ..91 Examples ..92 See Also..92set_boundary_condition..92 Name ..92 Syntax ..92 Arguments ..93 Description.

10 93 Examples ..94 See Also..94set_convergence_goal ..94 Name ..94 Syntax ..95 Arguments ..95 Description ..96 Examples ..97 See Also..97set_fill_nets ..97 Name ..97 Syntax ..97 Arguments ..98 Description ..98 Examples ..98set_ground_level ..98 Name ..98xRaphael NXT User ..98 Arguments ..99 Description ..99 Examples ..99set_grounded_nets_ok ..99 Name ..99 Syntax ..99 Arguments ..100 Description ..100 Examples ..101 See Also..101set_layer_inflation ..101 Name ..101 Syntax ..101 Arguments ..101 Description ..102 Examples ..102 See Also..102set_layer_side_tangent ..102 Name ..102 Syntax ..102 Arguments ..103 Description ..103 Examples ..104 See Also..104set_min_capacitance ..105 Name ..105 Syntax ..105 Description ..105 Examples ..105 See Also..105set_net_convergence_goal ..105 Name.


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