Smart Mobility ARChitecture Design Guide - sget.org

1 Smart Mobility ARChitecture Design Guide SMARC Design Guide March 23, 2017. Copyright 2017, SGeT Standardization Group for Embedded Technology Note that some content of this SGeT document may be legally protected by patent rights not held by SGeT. SGeT is not obligated to identify the parts of this specification that require licensing or other legitimization. The contents of this SGeT document are advisory only. Users of SGeT documents are responsible for protecting themselves against liability for infringement of patents. All content and information within this document are subject to change without prior notice. SGeT provides no warranty with regard to this SGeT document or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing.

2 SGeT assumes no liability for any damages incurred directly or indirectly from any technical or typographical errors or omissions contained herein or for discrepancies between the product and this SGeT document. In no event shall SGeT be liable for any incidental, consequential, special, or exemplary damages, whether based on tort, contract or otherwise, arising out of or in connection with this SGeT document or any other information contained herein or the use thereof. SMARC Design Guide Page 2 of 119 Mar 23, 2017 SGeT REVISION HISTORY. Revision Comments Originator Date Initial Release S. Milnor / Kontron July 1, 2013. Created sharper images for Fig 19, 60, 69 S.

3 Milnor / Kontron July 5, 2013. Fixed small typos and grammar mistakes Update to SMARC Hardware B. Mayer / Technagon March 23, 2017. Specification SMARC Design Guide Page 3 of 119 Mar 23, 2017 SGeT CONTENTS. 1 10. General Introduction .. 10. Purpose of This 10. Design Help .. 10. Abbreviations and Acronyms Used .. 11. Document References .. 13. SGET Documents .. 13. Industry Standards Documents .. 13. Schematic Example Correctness .. 15. Software Support .. 15. Schematic Example Conventions .. 16. 2 Infrastructure: Connector, Power Delivery, System Management .. 18. Module Connector .. 18. Module Power .. 21. Input Voltage Range.

4 21. Input Voltage Rise Time .. 21. Module Maximum Input Power .. 21. Power Path .. 21. Module I/O Voltage .. 23. VIN_PWR_BAD# .. 24. CARRIER_PWR_ON .. 24. Reset In to Module .. 24. Power Button .. 25. Force Recovery .. 26. Power Up Sequence .. 27. CARRIER_STBY# .. 28. Boot Selection .. 29. Boot Definitions .. 29. SMARC BOOT_SEL Pins .. 30. RTC Backup Power .. 31. Reserved / Test Interfaces .. 32. 3 Display Interfaces .. 33. Module LVDS .. 33. NEC 1280 x 768 Single Channel LVDS Example .. 33. LVDS Dual Channel example .. 35. Display Parameters and EDID .. 37. HDMI .. 38. DisplayPort (DP++) .. 39. HDMI over DP++ .. 39. Embedded DisplayPort (eDP).

5 40. MIPI DSI .. 41. 4 Low / Medium Speed Serial I/O Interfaces .. 42. Asynchronous Serial Ports .. 42. RS232 Ports .. 42. RS485 43. I2C Interfaces .. 45. General .. 45. I2C Level Translation, Isolation and Buffering .. 45. I2C_PM Bus EEPROMs .. 47. General I2C Bus EEPROMs .. 49. I2C Based I/O Expanders .. 50. Other I2C Devices .. 51. Touch Screen Controller Interfaces .. 53. General .. 53. Interface Types / Driver Considerations .. 53. SMARC Design Guide Page 4 of 119 Mar 23, 2017 SGeT Touch Controller Modules / ICs / Screens .. 53. I2C Interface to Touch Controller .. 55. I2S Interfaces .. 56. General Information .. 56. Cirrus Logic I2S Audio Example.

6 56. Texas Instruments TLV320 AIC3105 I2S Audio Example .. 57. lntel High Definition Audio over 58. Audio 59. SPI Interfaces .. 59. General .. 59. SMARC Implementation .. 60. SPI Device Examples I/O .. 61. CAN 62. General .. 62. SMARC Implementation .. 63. Isolation .. 63. 5 High Speed Serial I/O 64. USB .. 64. General .. 64. USB0 Client / Host Direct From Module .. 64. USB1 and USB2 Host Ports direct from Module .. 66. USB .. 67. USB OTG .. 67. USB Hub On Carrier .. 69. GBE .. 72. GBE Carrier Connector Implementation Example .. 72. GBE Mag-Jack Connector Recommendations .. 74. GBE LEDs .. 75. GBE software-defined Pins .. 77.

7 PCIe .. 77. General .. 77. PCIe x1 Device Down on Carrier .. 78. Mini-PCIe .. 79. PCIe Reference Clock buffer .. 80. SATA .. 81. General .. 81. mSATA / MO-300 .. 82.. 82. B keying .. 83. M keying .. 84. E keying .. 84. 6 Memory Card Interfaces .. 86. SD 86. 7 Camera Interfaces .. 87. General .. 87. Camera Data Interface 87. Camera Sensors and Camera Module Vendors .. 87. Serial Camera Interface Example .. 87. Other Camera Options .. 88. 8 GPIO .. 89. SMARC Module Native GPIO .. 89. GPIO Expansion .. 89. 9 Carrier Power Circuits .. 90. Power Budgeting .. 90. Input Power Sources .. 91. Power Budgeting, Continued Fixed 5V Power Source.

8 92. Fixed 5V DC Power Input Circuit Example .. 93. Power Hot Swap Controller .. 96. SMARC Design Guide Page 5 of 119 Mar 23, 2017 SGeT High Voltage LED 97. to Power Input Example .. 98. 12V Input .. 99. Wide Range Power Input .. 100. Power Monitoring .. 100. Power Over Ethernet .. 102. Li-ION Battery Charger .. 104. General .. 104. Battery Charger Circuit 105. 10 Thermal Management .. 109. General .. 109. Heat Spreaders .. 109. Heat Sinks .. 111. Thermal Resistance 112. 11 Carrier PCB Design Rule Summary .. 113. General PCB Construction Terms .. 113. Differential Pair Cautions .. 114. General Routing Rules and Cautions .. 115.

9 Trace Parameters for High-Speed Differential Interfaces .. 116. Trace Parameters for Single Ended Interfaces .. 117. PCB Construction Suggestions .. 118. SMARC Design Guide Page 6 of 119 Mar 23, 2017 SGeT FIGURES. Figure 1 Schematic Symbol Conventions .. 16. Figure 2 Module Connector Pins P1-74 and S1-75 .. 19. Figure 3 Module Connector Pins P75-156 and S76-158 .. 20. Figure 4 Basic Module and Carrier Power Path .. 22. Figure 5 Reset Switch .. 24. Figure 6 Power Button Switch .. 25. Figure 7 Force Recovery Switch .. 26. Figure 8 SMARC Carrier Power up Sequence - No Power Button Case .. 27. Figure 9 SMARC Carrier Power up Sequence - With Power Button Case.

10 28. Figure 10 Boot Selection Jumpers .. 30. Figure 11 RTC Backup: Coin Battery / Super Cap .. 31. Figure 12 Module LVDS: NEC Single Channel Display .. 33. Figure 13 LVDS Dual Channel .. 36. Figure 14 LVDS Dual Channel Power Supply .. 36. Figure 15 Carrier EDID EEPROM .. 37. Figure 16 HDMI Implementation .. 38. Figure 17 DisplayPort ++ .. 39. Figure 18 HDMI over DP++.. 40. Figure 19 Embedded DisplayPort (eDP) .. 41. Figure 20 MIPI DSI .. 41. Figure 21 Asynchronous Serial Port Transceiver RS232 TRS3253E .. 42. Figure 22 Asynchronous Serial Port Transceiver RS232 MAX13235E .. 43. Figure 23 Asynchronous Serial Port Transceiver - RS485 Half Duplex.