Spin-On-Dielectrics: Characteristics and Modeling Review ...

1 MSE700 Winter 2003 J. Smythe 1 of 25 UW#7632616 spin -On-Dielectrics: Characteristics and Modeling Review by John A. Smythe March 22, 2003 Material Science and Engineering University of Washington MSE700 Winter 2003 J. Smythe 2 of 25 UW#7632616 Background and Introduction The idea of replacing chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), and sputter oxide materials, among others, with a spin -on approach has been of interest in the Semiconductor industry for the last two decades. The basic technique draws from the planarizing nature of a liquid when applied to surface topography.

2 The method was initially known as spin -On-Glass (SOG) and has more recently taken on the more general acronym of spin -On- dielectric (SOD). The focus over the years has been to make the material as close to oxide (SiO2) as possible after a cure step or series of cure steps in various ambient gases, temperatures and pressures. The work includes doped oxides such as phosphor-silicate-glass (PSG) because of important mobile cation gettering Characteristics . The many works have addressed issues including, but not limited to, crack resistance, etch rate in both wet and dry etch chemistries, resistance to photo resist stripping conditions, film stress control, and particulate control.

3 The ideal result, in many present day applications, would be to find a material that would match the materials character of densified or as-deposited high-density-plasma (HDP) oxide. There are still applications where matching the materials character of densified (often called reflow or flow ) boro-phospho-silicate-glass (BPSG) or phosphor-silicate-glass (PSG) would be beneficial. The one characteristic that has not been addressed with rigor is the interaction between underlying topography and degree of local and global planarization. The general concepts are widely known in the industry but little has been done to provide models that guide the 2D-layout rules of semiconductor circuit design.

4 Some relevant work has been done outside the industry. The process technology known as Chemical-Mechanical-Polishing (CMP) has conversely received focus in this area with many papers and Doctoral Theses, particularly at MIT, on the subject of Modeling such interactions. Now that widely used SOD materials have been sufficiently refined and new materials developed, it is appropriate to develop models that will guide optimization of layout to facilitate optimum benefit from implementation of SOD materials in sub 100 nm semiconductor process technologies.

5 This work will provide a chronology of materials, characterization and integration results from early 1986 to present day. Though not exhaustive, the work is intended to be thorough in regards to materials, methods, analysis, and trends throughout the ever shrinking technology design rule sequence. Where appropriate, reference to work outside the semiconductor industry will also be discussed. The work then proposes an approach to Modeling the local and global planarization character in the context of underlying topography and how those results would be used to guide 2D-layout rules and define limitations in the 3D sense.

6 MSE700 Winter 2003 J. Smythe 3 of 25 UW#7632616 A Historical Discussion Our walk through time begins with papers published in 1986. At that time, use of silicate based materials and some siloxanes were common for inter-metal dielectric planarization. The general intent at that time was to provide a smoothing effect from one metallization pattern to the next. The motivation came from the need to improve the continuity ( step coverage) of metal conductors and to reduce depth of focus and stringer effects for photolithography and etch processing respectively.

7 Each SOG material would contain some level of carrier solvent that had to be cured from the coating. The end result was to have a film that acted like a CVD oxide after cure was completed. This theme has been a common thread to this day with various degrees of success. Nakamura1 and coworkers provide a general formula (Equation 1) for what were known as linear silicates: Equation 1 SinOn-1(OH)2n+1 where n = 1, 2, 3, .. They state that when heated, successive bonding of Si-O-Si takes place through dehydration following Equation 2: Equation 2 SinOn-1(OH)2n+2 SinOn(OH)2n + H2O The carrier solvent in this work was ethanol.

8 The samples of ethanol silicates were cured from 200 to 1200 C for 1 hour in N2. The primary object being to drive off the volatile organic solvent and then react the silicate to drive off as much water as possible. One aspect of their work was to measure the film stress. Their results led them to conclude, The intrinsic stress must be brought about by bond strains originating from the dehydration reaction. They also proposed that the intrinsic stress and density for samples heat treated above 800 C are driven by distortion relief of O-Si-O bond angle from tetrahedron position and elongation of the Si-O-Si bond.

9 The next work by Chu provides insight to some of the integration issues associated with implementation of SOG materials. They report on an inter-metal application evaluation and selection process. They used the following categories: material stability, material consistency, film shrinkage, adhesion, vendor support, and ability to coat in the 1000 to 5000 range. The basic requirement was to reduce the topography created by patterning of the first layer of aluminum metallization. Two fundamental approaches were used: SOG on CVD oxide and CVD oxide on SOG.

10 This was aggressive for the time; as it was more common to use a sacrificial etch back approach in this era. However, the cost and simplification made it worth understanding the limitations and possibilities. Adhesion failures were noted when SOG is in direct contact with metal or photo resist is in direct contact with SOG. For these reasons, the sacrificial SOG ( etch back) approach is generally preferred. With regards to planarization, they report that the amount of SOG remaining in the device depends on the underlying metal aspect ratio and the initial CVD dielectric thickness.