Transcription of Vivado Design Suite Tcl Command Reference Guide
1 Vivado Design Suite TclCommand Reference GuideUG835 ( ) October 30, 2019 See all versionsof this documentRevision HistoryThe following table shows the revision history for this document:SectionRevision Summary10/30/2018 , delete_qor_suggestions, get_hw_ddrmcs, open_hw_manager, open_hw_platform, refresh_hw_ddrmc, report_hw_ddrmc, update_sw_parameters, validate_hw_platform, write_hw_platform, write_hw_platform_metadataCommands Added in , assign_bd_address, config_timing_analysis, connect_hw_server, create_bd_intf_port, create_bd_port, create_ip, export_as_example_design, get_bels, highlight_objects, launch_runs, make_bd_intf_pins_external, make_bd_pins_external, place_design, pr_recombine, pr_subdivide, program_hw_devices, read_checkpoint, read_qor_suggestions, report_incremental_reuse.
2 Report_ip_status, report_methodology, report_qor_suggestions, report_ram_utilization, synth_design, unhighlight_objects, write_checkpoint, write_ibis, write_project_tcl, write_qor_suggestions, write_xdcCommands Modified in , launch_sdk, open_dsa, open_hw, report_sdx_utilization, validate_dsa,write_dsa, write_sysdefCommands Removed in , write_qor_suggestions, config_implementation, get_qor_suggestions, write_abstract_shell, get_bd_regs, report_config_implementationCommands Added in , report_ram_utilization, report_design_analysis, opt_design, report_exceptions, connect_bd_intf_net, write_hw_ila_data, get_ips, assign_bd_address, config_timing_analysis, report_disable_timing, read_iphys_opt_tcl, report_qor_suggestions, iphys_opt_design, report_control_sets, setup_ip_static_libraryCommands Modified in Removed in HistoryUG835 ( ) October 30, 2019 Command Reference Guide 2 Send FeedbackChapter 1 IntroductionOverview of Tcl Capabilities in VivadoThe Tool Command Language (Tcl) is the scripting language integrated in the Vivado toolenvironment.
3 Tcl is a standard language in the semiconductor industry for applicationprogramming interfaces, and is used by Synopsys Design Constraints (SDC).SDC is the mechanism for communicating timing constraints for FPGA synthesis tools fromSynopsys Synplify as well as other vendors, and is a timing constraint industry standard;consequently, the Tcl infrastructure is a Best Practice for scripting lets you perform interactive queries to Design tools in addition to executing automatedscripts. Tcl offers the ability to ask questions interactively of Design databases, particularlyaround tool and Design settings and state.
4 Examples are: querying specific timing analysisreporting commands live, applying incremental constraints, and performing queries immediatelyafter to verify expected behavior without re-running any tool following sections describe some of the basic capabilities of Tcl with : This manual is not a comprehensive Reference for the Tcl language. It is a Reference to the specificcapabilities of the Vivado Design Suite Tcl shell, and provides Reference to additional Tcl the Vivado Design SuiteYou can launch the Vivado Design Suite and run the tools using different methods depending onyour preference. For example, you can choose a Tcl script-based compilation style method inwhich you manage sources and the Design process yourself, also known as Non-Project , you can use a project-based method to automatically manage your Design processand Design data using projects and project states, also known as Project Mode.
5 Either of thesemethods can be run using a Tcl scripted batch mode or run interactively in the Vivado IDE. Formore information on the different Design flow modes, see the Vivado Design Suite User Guide : Design Flows Overview (UG892).UG835 ( ) October 30, 2019 Command Reference Guide 3 Send FeedbackTcl Shell ModeIf you prefer to work directly with Tcl commands, you can interact with your Design using Tclcommands with one of the following methods: Enter individual Tcl commands in the Vivado Design Suite Tcl shell outside of the Vivado IDE. Enter individual Tcl commands in the Tcl Console at the bottom of the Vivado IDE.
6 Run Tcl scripts from the Vivado Design Suite Tcl shell. Run Tcl scripts from the Vivado the following Command to invoke the Vivado Design Suite Tcl shell either at the Linuxcommand prompt or within a Windows Command Prompt window: Vivado -mode tcl TIP: On Windows, you can also select Start All Programs Xilinx Design Tools Vivado Tcl Shell, where is the installed version of more information about using Tcl and Tcl scripting, see the Vivado Design Suite User Guide :Using the Tcl Scripting Capabilities (UG894). For a step-by-step tutorial that shows how to use Tclin the Vivado tool, see the Vivado Design Suite Tutorial: Design Flows Overview (UG888).
7 Tcl Batch ModeYou can use the Vivado tools in batch mode by supplying a Tcl script when invoking the tool. Usethe following Command either at the linux Command prompt or within a Windows CommandPrompt window: Vivado -mode batch -source <your_Tcl_script>The Vivado Design Suite Tcl shell will open, run the specified Tcl script, and exit when the scriptcompletes. In batch mode, you can queue up a series of Tcl scripts to process a number ofdesigns overnight through synthesis, simulation, and implementation, and review the results onthe following can also pass arguments to the Vivado Command when sourcing a Tcl script in batch -tclargs option lets you specify arguments for the Tcl script you are running.
8 For example: Vivado -mode batch -source -tclargs "FPGA=115-2"IMPORTANT! You must enclose the Tcl argument and value in quotes as shown in the example above, or therecan be an error in handling the 1: IntroductionUG835 ( ) October 30, 2019 Command Reference Guide 4 Send FeedbackVivado IDE ModeYou can launch the Vivado Design Suite and run the tools using different methods depending onyour preference. For example, you can choose a Tcl script-based compilation style method inwhich you manage sources and the Design process yourself, also known as Non-Project , you can use a project-based method to automatically manage your Design processand Design data using projects and project states, also known as Project Mode.
9 Either of thesemethods can be run using a Tcl scripted batch mode or run interactively in the Vivado IDE. Formore information on the different Design flow modes, see the Vivado Design Suite User Guide : Design Flows Overview (UG892).If you prefer to work in a GUI, you can launch the Vivado IDE from Windows or linux . For moreinformation on the Vivado IDE, see the Vivado Design Suite User Guide : Using the Vivado IDE(UG893).Launch the Vivado IDE from your working directory. By default the Vivado journal and log files,and any generated report files, are written to the directory from which the Vivado tool islaunched.
10 This makes it easier to locate the project file, log files, and journal files, which arewritten to the launch the Windows OS, select Start All Programs Xilinx Design Tools Vivado Tcl Shell, where is the installed version of : You can also double-click the Vivado IDE shortcut icon on your Windows the linux OS, enter the following Command at the Command prompt: Vivado -or- Vivado -mode gui If you need help, with the Vivado tool Command line executable, type: Vivado -help If you are running the Vivado tool from the Vivado Design Suite Tcl shell, you can open theVivado IDE directly from the Tcl shell by using the start_gui the Vivado IDE, you can close the Vivado IDE and return to a Vivado Tcl shell by using thestop_gui Journal FilesWhen you invoke the Vivado tool, it writes the file to record the variouscommands and operations performed during the Design session.