VS1053b Datasheet - VLSI

1 VS1053b DatasheetVS1053b -Ogg Vorbis/MP3/AAC/WMA/FLAC/MIDI AUDIO CODEC CIRCUITF eatures DecodesOgg Vorbis;MP3 = MPEG 1 & 2 audio layer III (CBR+VBR +ABR);MP1/MP2 = layers I & II optional;MPEG4 / 2 AAC-LC(+PNS),HE-AAC v2 (Level 3) (SBR + PS);WMA all profiles (5-384 kbps);General MIDI 1 / SP-MIDI format 0 files;FLAC with software plugin;WAV (PCM + IMA ADPCM) Encodes Ogg Vorbis w/ software plugin Encodes stereo IMA ADPCM / PCM Streaming support for MP3 and WAV EarSpeaker Spatial Processing Bass and treble controls Operates with a single MHz clock Can also be used with a MHz clock Internal PLL clock multiplier Low-power operation High-quality on-chip stereo DAC with nophase error between channels Zero-cross detection for smooth volumechange Stereo earphone driver capable of driv-ing a 30 load Quiet power-on and power-off I2S output interface for external DAC Separate voltages for analog, digital, I/O On-chip RAM for user code and data Serial control and data interfaces Can be used as a slave co-processor SPI flash boot for special applications UART for debugging purposes New functions may be added with soft-ware and up to 8 GPIO pins Lead-free RoHS-compliant packageDescriptionVS1053b is an Ogg Vorbis/MP3/AAC/WMA/FLAC/WAVMIDI audio decoder as well as anPCM/IMA ADPCM/Ogg Vorbis encoder on asingle chip.

2 It contains a high-performance,proprietary low-power DSP processor coreVS_DSP4, data memory, 16 KiB instructionRAM and + KiB data RAM for user appli-cations running simultaneously with any built-in decoder, serial control and input data in-terfaces, up to 8 general purpose I/O pins,an UART, as well as a high-quality variable-sample-rate stereo ADC (mic, line, line + micor 2 line) and stereo DAC, followed by anearphone amplifier and a common voltage receives its input bitstream througha serial input bus, which it listens to as asystem slave. The input stream is decodedand passed through a digital volume controlto an 18-bit oversampling, multi-bit, sigma-delta DAC. The decoding is controlled via aserial control bus. In addition to the basic de-coding, it is possible to add application spe-cific features, like DSP effects, to the userRAM factory-programmable unique chipID provides basis for digital rights manage-ment or unit identification : , 2017-11-171VS1053b DatasheetCONTENTSC ontentsVS10531 Table of Contents2 List of Figures51 Licenses62 Disclaimer63 Definitions64 Characteristics & Maximum Ratings.

3 Operating Conditions .. Characteristics .. Consumption .. Characteristics .. Characteristics - Boot Initialization .. 105 Packages and Pin .. 116 Connection Diagram, LQFP-48147 SPI Bus Pin Descriptions .. Native Modes (New Mode, recommended) .. Compatibility Mode (deprecated, do not use in new designs) Request Pin DREQ .. Protocol for Serial Data Interface (SPI / SDI) .. in VS10xx Native Modes (New Mode, recommended) .. Timing Diagram in VS10xx Native Modes (New Mode) .. in VS1001 Compatibility Mode (deprecated, do not use in newdesigns) .. SDI Mode (deprecated, do not use in new designs) .. Protocol for Serial Command Interface (SPI / SCI) .. Read .. Write .. Multiple Write .. Timing Diagram .. Examples with SM_SDINEW and SM_SDISHARED set .. SCI Writes .. SDI Bytes .. Operation in Middle of Two SDI Bytes .. 258 Supported Audio Decoder MP3 (MPEG layer III) Formats.

4 MP2 (MPEG layer II) Formats .. 27 Version: , 2017-11-172VS1053b MP1 (MPEG layer I) Formats .. Ogg Vorbis Formats .. AAC (ISO/IEC 13818-7 and ISO/IEC 14496-3) Formats .. WMA Formats .. FLAC Formats .. RIFF WAV Formats .. MIDI Formats .. 329 Functional Features .. Flow of VS1053b .. Spatial Processing .. Data Interface (SDI) .. Control Interface (SCI) .. Registers .. (RW) .. (RW) .. (RW) .. (RW) .. (RW) .. (RW) .. (RW) .. (W) .. and SCI_HDAT1 (R) .. SCI_AIADDR (RW) .. SCI_VOL (RW) .. SCI_AICTRL[x] (RW) .. 4810 Clocking .. Hardware Reset .. Software Reset .. Low Power Mode .. Play and Decode .. Playing a Whole File .. Cancelling Playback .. Fast Play .. Fast Forward and Rewind without Audio .. Maintaining Correct Decode Time.

5 Feeding PCM Data .. Ogg Vorbis Recording .. PCM / ADPCM Recording .. Activating PCM / ADPCM Recording Mode .. Reading PCM / IMA ADPCM Data .. Adding a PCM RIFF Header .. Adding an IMA ADPCM RIFF Header .. Playing ADPCM Data .. Sample Rate Considerations .. Record Monitoring Volume .. SPI Boot .. Real-Time MIDI .. 60 Version: , 2017-11-173VS1053b Extra Parameters .. Common Parameters .. WMA .. AAC .. Midi .. Ogg Vorbis .. SDI Tests .. Old Sine Test .. New Sine and Sweep Tests .. Pin Test .. SCI Test .. Memory Test .. 6911 VS1053b Who Needs to Read This Chapter .. The Processor Core .. VS1053b Hardware DAC Audio Paths .. VS1053b Hardware ADC Audio Paths .. VS1053b Memory Map .. SCI Hardware Registers .. Serial Data Interface (SDI) Registers.

6 DAC Registers .. PLL Controller .. GPIO .. Interrupt Control .. UART (Universal Asynchronous Receiver/Transmitter) .. UART Registers .. Status UART_STATUS .. Data UART_DATA .. Data High UART_DATAH .. Divider UART_DIV .. UART Interrupts and Operation .. Timers .. Timer Registers .. Configuration TIMER_CONFIG .. Configuration TIMER_ENABLE .. Timer X Startvalue TIMER_Tx[L/H] .. Timer X Counter TIMER_TxCNT[L/H] .. Timer Interrupts .. I2S DAC Interface .. Analog-to-Digital Converter (ADC) .. Resampler SampleRate Converter (SRC) .. Sidestream Sigma-Delta Modulator (SDM) .. 8612 Version Changes Between VS1033c and VS1053a/b Firmware, 2007-03-08 .. 8713 Latest Document Version Changes8914 Contact Information90 Version: , 2017-11-174VS1053b DatasheetLIST OF FIGURESList of Figures1 Pin configuration, LQFP-48.. 112VS1053b in LQFP-48 packaging.

7 113 Typical connection diagram using LQFP-48.. 144 SDI in VS10xx Native Mode, single-byte transfer .. 185 SDI in VS10xx Native Mode, multi-byte transfer,X 1.. 186 SDI timing diagram .. 197 SDI in VS1001 Mode - one byte transfer. Do not use in new designs! .. 208 SDI in VS1001 Mode - two byte transfer. Do not use in new designs! .. 209 SCI word read .. 2110 SCI word write .. 2211 SCI multiple word write .. 2212 SPI timing diagram .. 2313 Two SCI operations .. 2414 Two SDI bytes .. 2415 Two SDI bytes separated by an SCI operation .. 2516 Data flow of VS1053b .. 3517 EarSpeaker externalized sound sources vs. normal inside-the-head sound .. 3618VS1053b ADC and DAC data paths with some data registers .. 7119VS1053b ADC and DAC data paths with some data registers .. 7220RS232 serial interface protocol .. 7821I2S interface, 192 kHz.. 83 Version: , 2017-11-175VS1053b Datasheet3 DEFINITIONS1 LicensesVS1053b contains WMA decoding technology from product is protected by certain intellectual property rights of Microsoft and cannotbe used or further distributed without a license from contains AAC technology (ISO/IEC 13818-7 and ISO/IEC 14496-3) which cannot beused without a proper license from Via Licensing Corporation or individual patent contains spectral band replication (SBR) and parametric stereo (PS) technologiesdeveloped by Coding Technologies.

8 Licensing of SBR is handled within MPEG4 through ViaLicensing Corporation. Licensing of PS is handled with Coding more the best of our knowledge, if the end product does not play a specific format that otherwisewould require a customer license: MPEG layers I and II, WMA, or AAC, the respectivelicense should not be required. Decoding of MPEG layers I and II are disabled by default,and WMA and AAC format exclusion can be easily performed based on the contents of theSCI_HDAT1 register. Also PS and SBR decoding can be separately DisclaimerAll properties and figures are subject to DefinitionsBByte, 8 Kibi =210= 1024 (IEC 60027-2).Mi Mebi =220= 1048576 (IEC 60027-2).VS_DSPVLSI Solution s DSP In VS_DSP, instruction words are 32-bit and data words are 16-bit : , 2017-11-176VS1053b Datasheet4 CHARACTERISTICS & SPECIFICATIONS4 Characteristics & Absolute Maximum RatingsParameterSymbolMinMaxUnitAnalog Positive Positive Positive at Any Non-Power Pin1 50mAVoltage at Any Digital + Temperature-40+85 CStorage Temperature-65+150 C1 Higher current can cause not exceed Recommended Operating ConditionsParameterSymbolMinTypMaxUnitAm bient Operating Temperature-40+85 CAnalog and Digital Ground1 AGND Analog, VREF= Analog, VREF= Clock Clock Clock Master Clock Duty Cycle405060%1 Must be connected together as close the device as possible for latch-up voltage can be internally selected between and , see section maximum sample rate that can be played with correct speed is XTALI/256 (or XTALI/512if SM_CLK_RANGE is set).

9 Thus, XTALI must be at least MHz ( MHz) to be ableto play 48 kHz at correct value . Recommended SC_MULT= , SC_ADD= (SCI_CLOCKF=0x8800).Do not exceed maximum specification for : , 2017-11-177VS1053b Datasheet4 CHARACTERISTICS & Analog CharacteristicsUnless otherwise noted:AVDD= ,CVDD= ,IOVDD= ,REF= ,TA= +85 C,XTALI= , Internal Clock . DAC tested with Hz full-scale outputsinewave, measurement bandwidth Hz, analog output load: LEFT to GBUF 30 ,RIGHT to GBUF 30 . Microphone test amplitude 48 mVpp (differential), fs=1 kHz, Line inputtest amplitude Vpp, fs=1 CharacteristicsParameterSymbolMinTypMaxU nitDAC Resolution18bitsTotal Harmonic Distortion, -3 dB of Harmonic Distortion, -3 dB of Range (DAC unmuted, A-weighted)IDR100dBS/N Ratio (full scale signal)SNR94dBInterchannel Isolation(Cross Talk), 600 + GBUF80dBInterchannel Isolation(Cross Talk), 30 + GBUF53dBInterchannel Gain Scale Output VoltageLEVEL1627501mVppFull Scale Output Voltage, VREF = VLEVEL1220501mVppDeviation from Linear Phase5 Analog Output Load ResistanceAOLR16302 Analog Output Load Capacitance100pFDC level (CBUF, LEFT, RIGHT) level (CBUF, LEFT, RIGHT), VREF = can be achieved with +-to-+ wiring for mono difference may be much lower, but belowTypicaldistortion performance may be CharacteristicsParameterSymbolMinTypMaxU nitMicrophone input amplifier gainMGAIN26dBMicrophone input amplitude (differential)

10 MLEV16641801mVpp ACMicrophone input amplitude (diff.), VREF = VMLEV12481401mVpp ACMicrophone Total Harmonic S/N RatioMSNR6072dBMicrophone input impedances, per pinMIMP45k Line input amplitudeLLEV16250028001mVpp ACLine input amplitude, VREF = VLLEV12190021001mVpp ACLine input Total Harmonic input S/N RatioLSNR8590dBLine input impedanceLIMP80k 1 Harmonic Distortion increases above typical : , 2017-11-178VS1053b Datasheet4 CHARACTERISTICS & Power ConsumptionInternal clock . TA=+25 C. IOVDD = V, AVDD = V, CVDD = activeParameterMinTypMaxUnitPower Supply Consumption APower Supply Consumption APower Supply Consumption AFull-scale sine in sine test modeParameterMinTypMaxUnitPower Supply Consumption AVDD, no load5mAPower Supply Consumption AVDD, output load 30 + GBUF303760mAPower Supply Consumption CVDD81015mA128 kbit/s Ogg Vorbis audio plaback, full volumeParameterMinTypMaxUnitPower Supply Consumption AVDD, no load5mAPower Supply Consumption AVDD, output load 30 11mAPower Supply Consumption AVDD, output load 30 + GBUF11mAPower Supply Consumption Digital CharacteristicsParameterMinMaxUnitHigh-L evel Input Voltage(xRESET, XTALI, XTALO) IOVDDIOVDD+ Input Voltage(other input pins)