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Zynq-7000 SoC: Embedded Design Tutorial

See all versions of this document zynq - 7000 SoC: Embedded Design Tutorial A Hands-On Guide to Effective Embedded System Design UG1165 ( ) June 10, 2020. Revision History Revision History The following table shows the revision history for this document. Section Revision Summary 06/10/2020 Version Whole document. Updated GUI screenshots. Creating a Platform Project in the Vitis software Platform Updated New Application Project settings. with an XSA from Vivado Running the Standalone CDMA Application Using the Vitis Updated New Application Project settings. software Platform Building an Application and Running it on the Target Board Updated New Application Project settings. Using the Vitis software Platform Example Design : Debugging the Linux Application Using the Updated New Application Project settings.

The purpose of this guide is to empower software application developers, system software designers, and system hardware designers by providing the following: • Tutorials for creating a system with the Zynq-7000 SoC processing system (PS) and the

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Transcription of Zynq-7000 SoC: Embedded Design Tutorial

1 See all versions of this document zynq - 7000 SoC: Embedded Design Tutorial A Hands-On Guide to Effective Embedded System Design UG1165 ( ) June 10, 2020. Revision History Revision History The following table shows the revision history for this document. Section Revision Summary 06/10/2020 Version Whole document. Updated GUI screenshots. Creating a Platform Project in the Vitis software Platform Updated New Application Project settings. with an XSA from Vivado Running the Standalone CDMA Application Using the Vitis Updated New Application Project settings. software Platform Building an Application and Running it on the Target Board Updated New Application Project settings. Using the Vitis software Platform Example Design : Debugging the Linux Application Using the Updated New Application Project settings.

2 Vitis software Platform Create the First Stage Boot Loader Executable File Updated New Application Project settings. Loading Modules and Executing Applications Updated New Application Project settings. Creating the Hello World Linux Application to Exercise the Updated New Application Project settings. OS Aware Debugging Feature 12/05/2019 Version General updates Added support for the Vitis software platform. 06/06/2018 Version General updates Verified for version of Vivado Design Suite, Xilinx . SDK, and PetaLinux Tools. UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 2. Table of Contents Revision Chapter 1: 5. About This 5. How zynq Devices Simplify Embedded Processor 7. How the Vivado Tools Expedite the Design 8. What You Need to Set Up Before 8. Chapter 2: Using the zynq SoC Processing Embedded System 12.

3 Example Project: Creating a New Embedded Project with zynq 12. Synthesizing the Design , Running Implementation, and Generating the 19. Exporting a Hardware 20. Creating a Platform Project in the Vitis software Platform with an XSA from 21. Example Project: Running the "Hello World" 25. Additional 28. Chapter 3: Using the GP Port in zynq 29. Adding IP in PL to the zynq SoC Processing 29. Standalone Application software for the 43. Chapter 4: Debugging with the Vitis software 45. Xilinx System 45. Debugging software Using the Vitis software 47. Chapter 5: Using the HP Slave Port with AXI CDMA 50. Integrating AXI CDMA with the zynq SoC PS HP Slave 50. Standalone Application software for the 55. Linux OS Based Application software for the CDMA Running Linux CDMA Application Using the Vitis software Chapter 6: Linux Booting and Debug in the Vitis software UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 3.

4 72. Booting Linux on a zynq SoC 73. Chapter 7: Creating Custom IP and Device Driver for 91. Creating Peripheral 92. Integrating Peripheral IP with PS GP Master 97. Linux-Based Device Driver Loading Module into Running Kernel and Application 101. Chapter 8: software Profiling Using the Vitis software 106. Profiling an Application in the Vitis software Platform with System 106. Additional Design Support 108. Chapter 9: Linux OS Aware Debugging Using the Vitis software Setting Up Linux OS Aware Debugging ..109. Debugging Linux Processes and Threads Using OS Aware Debug .. 112. Appendix A: Additional Resources and Legal 120. Xilinx Solution 120. Documentation Navigator and Design 120. Design Files for This 121. Training Please Read: Important Legal 123. UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 4.

5 Chapter 1: Introduction Chapter 1. Introduction About This Guide This document provides an introduction to using the Xilinx Vivado Design Suite flow for using the zynq - 7000 SoC device. The examples are targeted for the Xilinx ZC702 Rev evaluation board and the tools used are the Vivado Design Suite and the Vitis unified software platform. The examples in this document were created using the Xilinx tools running on Windows 7, 64-bit operating system, and PetaLinux on Linux 64-bit operating system. Other versions of the tools running on other Window installs might provide varied results. These examples focus on introducing you to the following aspects of Embedded Design . Note: The sequence mentioned in the Tutorial steps for booting Linux on the hardware is specific to the PetaLinux tools released for , which must be installed on the Linux host machine for exercising the Linux portions of this document.

6 Document Audience and Scope The purpose of this guide is to empower software application developers, system software designers, and system hardware designers by providing the following: tutorials for creating a system with the zynq - 7000 SoC processing system (PS) and the programmable logic (PL). tutorials on booting the Linux OS on the zynq SoC board and application development with PetaLinux tools tutorials on debugging in the Vitis integrated Design environment (IDE). System Design examples Example Project The best way to learn a tool is to use it. So, this guide provides opportunities for you to work with the tools under discussion. Specifications for sample projects are given in the example sections, along with an explanation of what is happening behind the scenes. Each chapter and examples are meant to showcase different aspects of Embedded Design .

7 The example takes you through the entire flow to complete the learning and then moves on to another topic. UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 5. Chapter 1: Introduction Additional Documentation Vivado Design Suite, System Edition Xilinx offers a broad range of development system tools, collectively called the Vivado Design Suite. Various Vivado Design Suite editions can be used for Embedded system development. In this guide, you will use the System Edition. The Vivado Design Suite editions are shown in the following figure. Figure 1: Vivado Design Suite Editions Other Vivado Components Other Vivado components include: Embedded /Soft IP for the Xilinx Embedded processors Documentation UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 6.

8 Chapter 1: Introduction Sample projects Vitis Unified software Platform The Vitis software platform includes the Vivado Design Suite, and works with hardware designs created in Vivado. The Vitis unified software platform is an integrated development environment (IDE) for the development of Embedded software applications targeted towards Xilinx Embedded processors. The Vitis software platform is based on the Eclipse open source. For more information about the Eclipse development environment, see PetaLinux Tools The PetaLinux Tools offer everything necessary to customize, build, and deploy Embedded Linux solutions on Xilinx processing systems. For more information, see the Embedded Design Tools web page. The PetaLinux Tools Design hub provides information and links to documentation specific to the PetaLinux Tools.

9 For more information, see Embedded Design Hub - PetaLinux Tools. How zynq Devices Simplify Embedded Processor Design Embedded systems are complex. Hardware and software portions of an Embedded Design are projects in themselves. Merging the two Design components so that they function as one system creates additional challenges. Add an FPGA Design project to the mix, and your Design has the potential to become complicated. The zynq SoC solution reduces this complexity by offering an Arm Cortex -A9 dual core, along with programmable logic, all within a single SoC. To simplify the Design process, Xilinx offers the Vivado Design Suite and the Vitis software platform. This set of tools provides you with everything you need to simplify Embedded system Design for a device that merges an SoC with an FPGA. This combination of tools offers hardware and software application Design , debugging capability, code execution, and transfer of the Design onto actual boards for verification and validation.

10 UG1165 ( ) June 10, 2020 Send Feedback zynq - 7000 SoC: Embedded Design Tutorial 7. Chapter 1: Introduction How the Vivado Tools Expedite the Design Process You can use the Vivado Design Suite tools to add Design sources to your hardware. These include the IP integrator, which simplifies the process of adding IP to your existing project and creating connections for ports (such as clock and reset). You can accomplish all your hardware system development using the Vivado tools along with IP. integrator. This includes specification of the microprocessor, peripherals, and the interconnection of these components, along with their respective detailed configuration. The Vitis software platform is used for software development, and can be installed and used without any other Xilinx tools installed on the machine on which it is loaded.


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