Transcription of 10GBASE-KR FEC Tutorial - IEEE 802
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10GBASE-KR FEC Tutorial - IEEE 802
IEEE802 Plenary July 200610 GBASE-KR FEC tutorial110 GBASE-KR FEC Tutorial Andre Szczepanek (TI)Ilango Ganga (Intel)Cathy Liu (LSI logic)Magesh Valliappan (Broadcom)IEEE802 Plenary July 200610 GBASE-KR FEC tutorial2 Acknowledgements Jim Hamstra (Flextronics) Winston Mok (PMC Sierra) For the OIF CEI-P FEC, & work on DFE error propagation Andrey Belogolovy (Intel) Andrey Ovchinnikov (Intel) For Code selection and simulation Luke Chang (Intel) Fulvio Spagna (Intel) Joe Caroselli (LSI Logic) For TF contributionsIEEE802 Plenary July 200610 GBASE-KR FEC tutorial3 Agenda Introduction FEC requirements & code selection DFE Error propagation Simulated Performance of the FEC Ease of Implementation ConclusionIEEE802 Plenary July 200610 GBASE-KR FEC tutorial4 IntroductionWhat is the 10 GBASE-KR FEC ?
IEEE802 Plenary July 2006 10GBASE-KR FEC tutorial 5 802.3ap FEC requirements & code selection Ilango Ganga, Intel
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