Transcription of 40GBASE-KR4 backplane PHY proposal - IEEE 802
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40GBASE-KR4 backplane PHY proposal - IEEE 802
03/18/2008 IEEE Task Force meeting, Orlando, FL140 GBASE-KR4 backplane PHY proposalRichard Mellitz & Ilango Ganga Intel CorporationMar 18, 2008 03/18/2008 IEEE Task Force meeting, Orlando, FL2 Contributors & Supporters Andre SzczepanekTexas Instruments Arthur MarrisCadence design Systems Pravin PatelIBM Chris DiMinicoMC Communications Scott Kipp Brocade Tom PalkertLuxtera Jeff CainCisco Systems03/18/2008 IEEE Task Force meeting, Orlando, FL3 Key messages proposal to adopt 10 GBASE-KR as a baseline for specifying 40 GBASE-KR4 with the following changes backplane layer diagram (Clause 69) Leverage 10 GBASE-KR PMD for operation over 4 lanes (Clause 72) Auto-Negotiation (Clause 73) Forward Error correction (Clause 74)03/18/2008 IEEE Task Force meeting, Orlando, FL4 Considerations for 40G BPE PHY To be architecturally consis
03/18/2008 IEEE 802.3ba Task Force meeting, Orlando, FL 2 Contributors & Supporters Andre Szczepanek Texas Instruments Arthur Marris Cadence Design …
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