Transcription of DRAM Technology - Smithsonian Institution
{{id}} {{{paragraph}}}
OVERVIEWDRAM (Dynamic Random Access Memory) is the main memory used for all desktop and largercomputers. Each elementary DRAM cell is made up of a single MOS transistor and a storagecapacitor (Figure 7-1). Each storage cell contains one bit of information. This charge, however,leaks off the capacitor due to the sub-threshold current of the cell transistor. Therefore, the chargemust be refreshed several times each second. HOW THE DEVICE WORKSThe memory cell is written to by placing a 1 or 0 charge into the capacitor cell. This is doneduring a write cycle by opening the cell transistor (gate to power supply or VCC) and presentingeither VCCor 0V (ground) at the capacitor. The word line (gate of the transistor) is then held atground to isolate the capacitor charge. This capacitor will be accessed for either a new write, aread, or a 7-2 shows a simplified DRAM diagram. The gates of the memory cells are tied to therows.
Photo by ICE, “Memory 1997” 20844 Figure 7-8. Samsung 64Mbit DRAM Cross Section Photo by ICE, “Memory 1997” 22433 METAL 1 METAL 3 METAL 2 POLY 1 TRENCH CAPACITORS Figure 7-7. IBM/Siemens 64Mbit DRAM Cross Section Photo by ICE, “Memory 1997” 22434 CAPACITOR DIELECTRIC POLY 4 CAPACITOR SHEET POLY 3 CAPACITOR PLATE POLY …
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document:
{{id}} {{{paragraph}}}