Transcription of Intel Stratix 10
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Intel Stratix 10
PRODUCT LINEGX 400SX 400GX 650SX 650GX 850SX 850GX 1100SX 1100GX 1650SX 1650GX 2100SX 2100GX 2500SX 2500GX 2800SX 2800GX 1660GX 2110GX 10 MResourcesLogic elements (LEs)1378,000612,000841,0001,325,0001,62 4,0002,005,0002,422,0002,753,0001,679,00 02,073,000 10,200,000 Adaptive logic modules (ALMs)128,160207,360284,960449,280550,54 0679,680821,150933,120569,200702,720 3,466,080 ALM registers512,640829,4401,139,8401,797,12 02,202,1602,718,7203,284,6003,732,4802,2 76,8002,810,880 13,864,320 Hyper-Registers from Intel HyperflexTM FPGA architectureMillions of Hyper-Registers distributed throughout the monolithic FPGA fabricProgrammable clock trees synthesizableHundreds of synthesizable clock treesM20K memory blocks1,5372,4893,4775,4615,8516,5019,96 311,7216,1626,847 12,950 M20K memory size (Mb)304968107114127195229120134 253 MLAB memory size (Mb)
Intel® Stratix® 10 PRODUCT LINE GX 400 SX 400 GX 650 SX 650 GX 850 SX 850 GX 1100 SX 1100 GX 1650 SX 1650 GX 2100 SX 2100 GX 2500 SX 2500 GX 2800 SX 2800 GX 1660 GX ...
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