Introduction to Deep Submicron CMOS Device Technology ...

Slide 1 Loke, Wee & PfiesterAgilent TechnologiesIntroduction to deep Submicron cmos Device Technology & Its Impact on Circuit DesignAlvin Loke, Tin Tin Wee & James R. PfiesterAgilent Technologies, Fort Collins, COIEEE Solid-State Circuits SocietyDecember 8, 2004 Slide 2 Loke, Wee & PfiesterAgilent TechnologiesOutline cmos Technology Trends MOSFET Basics deep Submicron FET Fabrication Sequence Enabling Technologies Second-Order Consequences Dealing with Process Variations in Manufacturing ConclusionsDisclaimer A proper introductionalone would take weeks, let alone a whole semester Need to omit lots of nitty-gritty yet important process details Hopefully.

2 – void-free deposition is critical CMP excess SiO 2 Strip Si 3N 4 polish stop etched away in subsequent ... detection CMP technology pioneered by IBM • Leveraged expertise from lens polishing. Slide 16 Loke, Wee & Pfiester ... Deeper subsurface implant • …

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  Devices, Introduction, Technology, Deep, Cmos, Detection, Subsurface, Void, Introduction to deep submicron cmos device technology, Submicron

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