Transcription of Second-Generation Digital Signal Processors (Rev. B)
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Second-Generation Digital Signal Processors (Rev. B)
TMS320 second GENERATIONDIGITAL Signal PROCESSORSSPRS010B MAY 1987 REVISED NOVEMBER 1990 POST OFFICE BOX 1443 HOUSTON, TEXAS 770011 ADVANCE INFORMATION concerns new products in thesampling or preproduction phase of data and other specifications are subject tochange without 1991, Texas Instruments Incorporated 80-ns Instruction Cycle Time 544 Words of On-Chip Data RAM 4K Words of On-Chip Secure ProgramEPROM (TMS320E25) 4K Words of On-Chip Program ROM(TMS320C25) 128K Words of Data/Program Space 32-Bit ALU/Accumulator 16 16-Bit Multiplier With a 32-Bit Product Block Moves for Data/ProgramManagement Repeat Instructions for Efficient Use ofProgram Space Serial Port for Direct Codec Interface Synchronization Input for SynchronousMultiprocessor Configurations Wait States for Communication to SlowOff-Chip Memories/Peripherals On-Chip Timer for Control Operations Single 5-V Supply Packaging: 68-Pin PGA, PLCC, andCER-QUAD 68-to-28 Pin Conversion Adapter Socket forEPROM Programming Commercial and Military Versions Available NMOS Technology: TMS32020200-ns cycle CMOS Technology: TMS320C25100-ns cycle TMS320E25100-ns cycle TMS320C25-5080-ns cycle data sheet provides complete design documentation for the Second-Generation devices of the T
tms320secondgeneration digitalsignalprocessors sprs010b — may 1987 — revised november 1990 2 post office box 1443 houston, texas …
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