Transcription of TMS320F2837xS Delfino™ Microcontrollers - TI.com
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TMS320F2837xS Delfino™ Microcontrollers - TI.com
ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand ,TMS320F28377 STMS320F28376S, TMS320F28375S, TMS320F28374 SSPRS881F AUGUST2014 REVISEDMAY2018 TMS320F2837xSDelfino Microcontrollers1 TMS320C28x32-BitCPU 200 MHz IEEE754 Single-PrecisionFloating-PointUnit(FPU) TrigonometricMathUnit (TMU) Viterbi/ComplexMathUnit (VCU-II) ProgrammableControlLaw Accelerator(CLA) 200 MHz IEEE754 Single-PrecisionFloating-PointInstructio ns ExecutesCodeIndependentlyof MainCPU On-ChipMemory 512KB(256KW)or 1MB(512KW)of Flash(ECC-Protected) 132KB(66KW)or 164KB(82KW)of RAM(ECC-Protectedor Parity-Protected) Dual-ZoneSecuritySupportingThird-PartyDe velopment UniqueIdentificationNumber Clockand SystemControl Two InternalZero-Pin10-MHzOscillators On-ChipCrystalOscillator WindowedWatchdogTimerModule MissingClockDetectionCircuitry , Design SystemPeripherals Two ExternalMemoryInterfaces(EMIFs)WithASRAM and SDRAMS upport 6-ChannelDirectMemoryAccess(DMA)
16-/12-bit ADC x4 ADC Result Regs Peripheral Frame 1 GPIO MUX, Input X-BAR, Output X-BAR Secure Memories shown in Red CPU1 Buses Comparator Subsystem (CMPSS)
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