Transcription of Wire-Streaming Processors on 2-D Nanowire ... - …
{{id}} {{{paragraph}}}
Wire-Streaming Processors on 2-D Nanowire FabricsTeng Wang, Mahmoud Ben-Naser, Yao Guo, Csaba Andras MoritzElectrical and Computer Engineering DepartmentUniversity of Massachusetts Amherst, MA, USA{twang, mbennase, yaoguo, of the research in the field of nanoelectronicshas been focused on nanodevices and fabrication as-pects and as a result a variety of nanodevice technolo-gies have been demonstrated. By contrast, very littlework has been reported on the design and evaluationof circuits and computational architectures using nano-devices. There is similarly not much work on the im-pact of device and fabric ( , the 2-D Nanowire ar-ray) properties on computing. In this paper, we focuson computing architectures based on silicon explore a simple stream processor developed on 2-D Nanowire fabrics and compare its density to a 30nmCMOS implementation. We also identify techniques towork around fabric-specific constraints. Our initial eval-uation shows that this stream processor has great den-sity advantage compared to CMOS : nanoscale circuits, architecture, NASIC,silicon nanowires, carbon nanotubes1 INTRODUCTIONN anotechnology is one of the most promising replace-ments for CMOS technology.}
Wire-Streaming Processors on 2-D Nanowire Fabrics ... Nanotiles are the basic building blocks of NASICs. ... a CMOS prototype in Verilog.
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document:
{{id}} {{{paragraph}}}
ANALOG INTEGRATED CIRCUITS DESIGN, UMASS, Amherst ANALOG INTEGRATED CIRCUITS DESIGN, Verilog, Amherst, Basic, Basic Verilog - UMass Amherst, Fault Model for Timing, Fault Model for Timing-InducedFunctional Errors, Design and Implementation of Open-Source SATA, Prediction Router, UMass Amherst, InteractionbetweenFaultAttackCountermeasures andtheResistanceagainstPowerAnalysisAttacks, Class-based Machine Description, Class-based Machine Description Language, Generation of Compilers and Simulators