C Band Block Up Converter

Data Sheet AD9081 - Analog Devices

Supports single, dual, and quad band Datapaths and DSP blocks are fully bypassable DAC to ADC sample rate ratios of 1, 2, 3, and 4 On-chip PLL with multichip synchronization External RFCLK input option for off-chip PLL Maximum DAC sample rate up to 12 GSPS Maximum data rate up to 12 GSPS using JESD204C

  Devices, Band, Analog devices, Analog

Introduction to OFDM

6 Cyclic Prefix T g T τ max T x Multi-path components Sampling start T 802.11a System Specification l Sampling (chip) rate: 20MHz l Chip duration: 50ns l Number of FFT points: 64 l FFT symbol period: 3.2µs l Cyclic prefix period: 16 chips or 0.8µs » Typical maximum indoor delay spread < 400ns » OFDM frame length: 80 chips or 4µs

MIPI/DSI Receiver with HDMI Transmitter Data Sheet ADV7533

Differential Input Impedance ZID 25°C VII 80 100 125 Ω AC SPECIFICATIONS Single Channel Data Rate 25°C IV 200 800 Mbps Data to Clock Setup Time tSETUP 25°C VII 0.15 UI INST Data to Clock Hold Time tHOLD 25°C VII 0.15 UI INST DSI Clock Duty Cycle 25°C VII 45 50 55 %