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USB3317C - Hi-Speed USB Transceiver with 1.8V-3.3V ULPI ...

USB3317C - Hi-Speed USB Transceiver with 1.8V-3.3V ULPI ...

ww1.microchip.com

SMSC USB3317 REV C Revision 2.1 (06-02-10) DATASHEET PRODUCT FEATURES Datasheet USB3317 Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock USB-IF “Hi-Speed” compliant to the Universal Serial Bus Specification Rev 2.0

  Reference, Interface, Clock, Ulpi interface 26mhz reference clock, Ulpi, 26mhz

USB3317C - Hi-Speed USB Transceiver with 1.8V-3.3V ULPI ...

USB3317C - Hi-Speed USB Transceiver with 1.8V-3.3V ULPI ...

ww1.microchip.com

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock SMSC USB3317 REV C 3 Revision 2.1 (06-02-10) PRODUCT PREVIEW General Description The USB3317 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems

  Reference, Interface, Clock, Ulpi interface 26mhz reference clock, Ulpi, 26mhz

Zynq UltraScale+ MPSoC Processing System v3 - Xilinx

Zynq UltraScale+ MPSoC Processing System v3 - Xilinx

www.xilinx.com

ULPI PS-GTR SMMU/CCI GFC USB 3.0 SGMII Low Power Domain Switch To ACP Low Power Full Power Battery Power 32-bit/64-bit 64-bit MS 128-bit MS LPD_PL HPC HPM GTY Quad GTH Quad Interlaken 100G Ethernet ACE DisplayPort Video and Audio Interface Low-latency Peripheral Port Low-latency Peripheral Port ACP 128 128 64 64 64

  System, Processing, Xilinx, Zynq, Ultrascale, Mpsoc, Ulpi, Zynq ultrascale mpsoc processing system

USB Solutions - Microchip Technology

USB Solutions - Microchip Technology

ww1.microchip.com

media card and Smart Card formats. Our Hi-Speed USB 2.0 switches and ULPI-based transceiv-ers provide an ultra-small footprint and data multiplexing on a common connector with proven ESD protection, and our newest product line built around power delivery, enable 100W of power

  Ulpi

Zynq-7000 SoC データシート 概要 - Xilinx

Zynq-7000 SoC データシート 概要 - Xilinx

japan.xilinx.com

• 外部 phy の接続用の 8 ビット ulpi インターフェイス • can 2.0b に完全に準拠した 2 つの can バス インター フェイス • can 2.0a、can 2.0b、iso 118981-1 規格に準拠 • 外部 phy インターフェイス • sd/sdio 2.0/mmc3.31 に準拠した 2 つのコントローラー

  Ulpi

ZCU111 Evaluation Board - Xilinx

ZCU111 Evaluation Board - Xilinx

www.xilinx.com

USB 3.0 Transceiver and USB 2.0 ULPI PHY [B] SMSC USB3320-EZK, WURTH 692122030100 24 6 J100 SD Card Interface MOLEX 5025700893 28 7 U34, J83 UART0 (MIO 18-19) FTDI FT4232Hx-REEL, Hirose ZX62D-AB-5P8 29 8U46 SI5341B 10 Independent Output Any-Frequency Clock Generator Silicon Labs SI5341B-D07833-GM 40

  Interface, Clock, Xilinx, Ulpi

STM32F405xx STM32F407xx - STMicroelectronics

STM32F405xx STM32F407xx - STMicroelectronics

www.st.com

DMA, on-chip full-speed PHY and ULPI – 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII LQFP64 (10 × 10 mm) LQFP100 (14 × 14 mm) LQFP144 (20 × 20 mm) UFBGA176 (10 × 10 mm) LQFP176 (24 × 24 …

  Ulpi

USB hardware and PCB guidelines using STM32 MCUs ...

USB hardware and PCB guidelines using STM32 MCUs ...

www.st.com

ULPI is required. D: USB 2.0 OTG HS controller with embedded on-chip HS PHYs The following table lists the STM32 devices supporting an USB and describes which USB peripheral is implemented in each of them. Table 3. USB implementation in STM32 devices Series / lines or references Supported USB(1) Size of dedicated packet buffer

  Guidelines, Hardware, Using, Ulpi, Usb hardware and pcb guidelines using

LPC435x/3x/2x/1x Product Data Sheet

LPC435x/3x/2x/1x Product Data Sheet

www.nxp.com

full-speed PHY and ULPI interface to external high-speed PHY. USB interface electrical test software included in ROM USB stack. One 550 UART with DMA support and full modem interface. Three 550 USARTs with DMA and synchronous mode support and a smart card interface conforming to ISO7816 specification. One USART with IrDA interface.

  Sheet, Data, Specification, Data sheet, Ulpi, Lpc435x 3x 2x 1x, Lpc435x

UTMI+ Low Pin Interface (ULPI) Specification

UTMI+ Low Pin Interface (ULPI) Specification

www.sparkfun.com

Route int pin to data(3) during 6-pin Serial Mode. Explain VBUS thresholds. Add T&MT diagram and updated text. Add new section to explain how PHY is aborted by Link. Various clarifications. 1.0rc2 January 13, 2004 Add block diagram. Tighten interface timing. Modify suspend protocol to more closely resemble UTMI.

  Specification, Interface, Uitm, Ulpi, Utmi low pin interface

Zynq-7000 SoC Data Sheet: Overview (DS190) - Xilinx

Zynq-7000 SoC Data Sheet: Overview (DS190) - Xilinx

www.xilinx.com

† 8-bit ULPI external PHY interface † Two full CAN 2.0B compliant CAN bus interfaces † CAN 2.0-A and CAN 2.0-B and ISO 118981-1 standard compliant † External PHY interface † Two SD/SDIO 2.0/MMC3.31 compliant controllers † Two full-duplex SPI ports with three peripheral chip selects † Two high-speed UARTs (up to 1 Mb/s)

  Sheet, Data, Data sheet, Xilinx, Ulpi

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