1732 IEEE JOURNAL OF SOLID-STATE CIRCUITS, …

1 1732 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 8, AUGUST 2007A Transient-Enhanced Low-QuiescentCurrent Low-Dropout Regulator WithBuffer Impedance AttenuationMohammad Al-Shyoukh, Hoi Lee, Member, IEEE, and Raul Perez, Member, IEEEA bstract This paper presents a low-dropout regulator (LDO)for portable applications with an impedance-attenuated buffer fordriving the pass device. Dynamically-biased shunt feedback is pro-posed in the buffer to lower its output resistance such that thepole at the gate of the pass device is pushed to high frequencieswithout dissipating large quiescent current. By employing the cur-rent-buffer compensation, only a single pole is realized within theregulation loop unity-gain bandwidth and over 65phase marginis achieved under the full range of the load current in the LDO.

2 TheLDO thus achieves stability without using any low-frequency maximum output-voltage variation can be minimized duringload transients even if a small output capacitor is LDO with the proposed impedance-attenuated buffer hasbeen implemented in a twin-well CMOS process. Theproposed LDO dissipates 20-A quiescent current at no-loadcondition and is able to deliver up to 200-mA load current. Witha1-F output capacitor, the maximum transient output-voltagevariation is within 3% of the output voltage with load step changesof 200 mA/100 Terms Linear regulator, load transient response, low-dropout regulator (LDO), pass device, power management inte-grated circuits, voltage INTRODUCTIONPOWER management is essential in all battery-poweredportable devices such as cellular phones and PDAs in orderto reduce the standby power and prolong the battery regulators (LDOs)

3 Are one of the most criticalpower management modules, as they can provide regulatedlow-noise and precision supply voltages for noise-sensitiveanalog blocks. With the widespread proliferation of modernportable devices, ever more stringent performance requirementsof the LDO are needed. First, low dropout voltage across thepass device of the LDO is required provide high power effi-ciency. In addition, the increased level of integration in portabledevices not only demands the LDO to deliver high load current,but also requires the no-load quiescent current of the LDO to beminimized for improving the current efficiency [1].

4 Good loadtransient response with small output-voltage variation includingovershoots and undershoots upon load switching is critical toManuscript received November 10, 2006; revised April 12, 2007. This workwas supported by Texas Instruments Al-Shyoukh is with Texas Instruments Inc., Dallas, TX 75243 USA, andalso with the Department of Electrical Engineering, University of Texas atDallas, Richardson, TX 75083-0688 USA (e-mail: Lee is with the Department of Electrical Engineering, University of Texasat Dallas, Richardson, TX 75083-0688 USA (e-mail: Perez is with Fyrestorm Inc., Sunnyvale, CA 94085 Object Identifier an accidental turn off or resetting of the portable de-vice.))

5 These four major performance requirements of the LDO,including low dropout voltage, high output current, low no-loadquiescent current, and small output transient undershoots andovershoots are, however, difficult to achieve LDO design, the ability to source high load current whileachieving low dropout voltage requires the use of a large sizepMOS transistor as the pass device [1]. In addition to thelow-frequency dominant pole generated by the output capac-itor, the large gate capacitance of the pMOS pass device createsanother low-frequency non-dominant pole within the unity-gainfrequency of the regulation loop, thereby degrading approaches have been reported to address this issue[1] [5].

6 In [1], an emitter-follower has been adopted as avoltage buffer to drive the pMOS pass device. The low outputresistance of the emitter-follower allows the pole at the gate ofthe pass device to be pushed beyond the unity-gain frequencyof the LDO regulation loop. The reported LDO dissipates lowquiescent current, while sourcing the maximum load currentof 50 mA [1]. However, if the LDO is required source a largerload current ( , 100 mA or more), a much larger pass devicewith larger gate capacitance is needed. The current dissipationof the emitter-follower thus needs to be greatly increased tofurther lower its output resistance at the gate of the pass devicefor maintaining loop stability.

7 Instead of dissipating largequiescent current in the voltage buffer to achieve loop stability,the approach of creating a low-frequency left-half-plane (LHP)zero has been widely employed, which provides positive phaseshift to compensate for the negative phase shift due to thelow-frequency non-dominant pole [2] [5]. The low-frequencyLHP zero can be generated by either adding a resistor inseries with the output capacitor (or the intrinsic equivalentseries resistor (ESR) of the output capacitor), namely ESRzero [2] [4], or relying on frequency compensation througha voltage-controlled current source [5].

8 However, the exactpole-zero cancellation within the unity-gain frequency of theLDO regulation loop is difficult to achieve under the full rangeof the load current. The incomplete pole-zero cancellation maylead to instability of the LDO in the worst condition. Smallpole-zero frequency mismatch within the unity-gain frequencycan degrade the quasi-linear transient settling behavior [6],[7] of the LDO upon load switching. Even worse, if the ESRzero approach is adopted, the resistor leads to large outputovershoots and undershoots during massive load-current stepchanges especially when a low-value output capacitorofmicro-farad range is $ 2007 IEEEAL-SHYOUKHet al.

9 : A TRANSIENT-ENHANCED LOW-QUIESCENT CURRENT LOW-DROPOUT REGULATOR WITH BUFFER IMPEDANCE ATTENUATION1733 Fig. 1. Typical structure of a low-dropout regulator with an intermediate buffer order to further improve LDO performances, bufferimpedance attenuation technique (BIA) isfirst proposed torealize an intermediate stage for driving the pMOS pass proposed BIA technique greatly reduces the output resis-tance of the buffer through dynamically-biased shunt a result, the pole at the gate of the pass device is pushedfar beyond the unity-gain frequency of the LDO regulationloop under the entire load current range even if a huge passdevice is used for achieving low dropout voltage and sourcinghigh load current.

10 The BIA technique thus allows the LDO todissipate low quiescent current. By employing current-buffercompensation in the LDO, only a single pole is realized withinthe unity-gain frequency and a good phase margin is achievedfor the entire load current range with a small compensationcapacitor. The LDO thus achieves stability without using anylow-frequency zero. Moreover, the LDO can have good tran-sient settling behavior and small output-voltage variation evenif a small output capacitor is paper is organized as follows. Section II presents theoperational principle of the proposed BIA technique, whiledifferent design considerations including the stability analysisof the LDO using current-buffer compensation and detailsof LDO circuit implementation are discussed in Section , Sections IV and V provide the measurement results ofthe proposed LDO and the conclusions, PROPOSEDIMPEDANCE-ATTENUATEDBUFFERFig.