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2012年2月7日 修士論文発表会 - iwailab.ep.titech ...
研究背景研究背景High-kHigh-k絶縁膜の導入絶縁膜の導入 近年のVLSIのMOSFET微細化に伴い 厚い膜厚でSiO 2と同等の電気容量を 得られるHigh-k絶縁膜 ・リーク電流増加、短チャネル効果の抑制 ・信頼性の向上etc. 更なる低EOT実現の為には SiO
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NiとSiの積層薄膜によって形成したシリサイドの …
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www.iwailab.ep.titech.ac.jpVLSI textbook Finally, there appears to be a fundamental limit 10 of approximately quartermicron channel length,where certain physical effects such as the tunneling through the gate oxide and fluctuations in the positions of impurities in the depletion layers begin to make the devices of smaller dimension unworkable.
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