Artix-7 FPGAs Data Sheet: DC and AC Switching ...

1 DS181 ( ) December 21, Specification1 2011 2017 xilinx , Inc. xilinx , the xilinx logo, Artix, Virtex, Kintex, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of xilinx in the United States and other countries. All other trademarks are the property of their respective -7 FPGAs are available in -3, -2, -1, -1LI, and -2L speed grades, with -3 having the highest performance. The Artix-7 FPGAs predominantly operate at a core voltage. The -1LI and -2L devices are screened for lower maximum static power and can operate at lower core voltages for lower dynamic power than the -1 and -2 devices, respectively. The -1LI devices operate only at VCCINT=VCCBRAM= and have the same speed specifications as the -1 speed grade. The -2L devices can operate at either of two VCCINT voltages, and and are screened for lower maximum static power.

2 When operated at VCCINT= , the speed specification of a -2L device is the same as the -2 speed grade. When operated at VCCINT= , the -2L static and dynamic power is FPGA DC and AC characteristics are specified in commercial, extended, industrial, expanded (-1Q), and military (-1M) temperature ranges. Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1M speed grade military device are the same as for a -1C speed grade commercial device). However, only selected speed grades and/or devices are available in each temperature range. For example, -1M is only available in the defense-grade Artix-7Q family and -1Q is only available in XA Artix-7 supply voltage and junction temperature specifications are representative of worst-case conditions.

3 The parameters included are common to popular designs and typical device and package combinations can be found in: 7 Series FPGAs Overview (DS180) Defense-Grade 7 Series FPGAs Overview (DS185) XA Artix-7 FPGAs Overview (DS197)This Artix-7 FPGA data sheet , part of an overall set of documentation on the 7 series FPGAs , is available on the xilinx website at CharacteristicsArtix-7 FPGAs data Sheet: DC and AC Switching CharacteristicsDS181 ( ) December 21, 2017 Product SpecificationTable 1:Absolute Maximum Ratings(1)SymbolDescriptionMinMaxUnitsFP GA LogicVCCINTI nternal supply voltage supply voltage voltage for the block RAM memories drivers supply voltage for HR I/O banks reference voltage (2)(3)(4)I/O input voltage + input voltage (when VCCO= ) for VREF and differential I/O standards except TMDS_33(5) memory battery backup supply TransceiverVMGTAVCCA nalog supply voltage for the GTP transmitter and receiver circuits supply voltage for the GTP transmitter and receiver termination circuits clock absolute input voltage (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage FeedbackArtix-7 FPGAs data sheet .

4 DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification2 IDCIN-FLOATDC input current for receiver input pins DC coupled RX termination = floating 14mAIDCIN-MGTAVTTDC input current for receiver input pins DC coupled RX termination = VMGTAVTT 12mAIDCIN-GNDDC input current for receiver input pins DC coupled RX termination = GND output current for transmitter pins DC coupled RX termination = floating 14mAIDCOUT-MGTAVTTDC output current for transmitter pins DC coupled RX termination = VMGTAVTT 12mAXADCVCCADCXADC supply relative to GNDADC reference input relative to GNDADC temperature (ambient) 65150 CTSOLM aximum soldering temperature for Pb/Sn component bodies(6) +220 CMaximum soldering temperature for Pb-free component bodies(6) +260 CTjMaximum junction temperature(6) +125 CNotes: beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device.

5 These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device lower absolute voltage specification always I/O operation, refer to 7 Series FPGAs SelectIO Resources User Guide (UG471). maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table Table 9 for TMDS_33 soldering guidelines and thermal considerations, see 7 Series FPGA Packaging and Pinout Specification (UG475).Table 2:Recommended Operating Conditions(1)(2)SymbolDescriptionMinTypM axUnitsFPGA LogicVCCINT(3)For -3, -2, -2LE ( ), -1, -1Q, -1M devices: internal supply -1LI ( ) devices: internal supply -2LE ( ) devices: internal supply supply (3)For -3, -2, -2LE ( ), -2LE ( ), -1, -1Q, -1M devices: block RAM supply -1LI ( ) devices: block RAM supply (4)(5)Supply voltage for HR I/O (6)I/O input voltage VCCO+ input voltage (when VCCO= ) for VREF and differential I/O standards except TMDS_33(7) (8)Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode.

6 10mAVCCBATT(9)Battery TransceiverVMGTAVCC(10)Analog supply voltage for the GTP transmitter and receiver (10)Analog supply voltage for the GTP transmitter and receiver termination supply relative to 1:Absolute Maximum Ratings(1) (Cont d)SymbolDescriptionMinMaxUnitsSend FeedbackArtix-7 FPGAs data sheet : DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification3 VREFPE xternally supplied reference temperature operating range for commercial (C) temperature devices0 85 CJunction temperature operating range for extended (E) temperature devices0 100 CJunction temperature operating range for industrial (I) temperature devices 40 100 CJunction temperature operating range for expanded (Q) temperature devices 40 125 CJunction temperature operating range for military (M) temperature devices 55 125 CNotes: voltages are relative to the design of the power distribution system consult 7 Series FPGAs PCB Design and Pin Planning Guide (UG483).

7 VCCINT and VCCBRAM are operating at the same voltage, VCCINT and VCCBRAM should be connected to the same data is retained even if VCCO drops to VCCO of , , , , , and at 5%. lower absolute voltage specification always Table 9 for TMDS_33 total of 200 mA per bank should not be is required only when using bitstream encryption. If battery is not used, connect VCCBATT to either ground or Each voltage listed requires the filter circuit described in 7 Series FPGAs GTP Transceiver User Guide (UG482).Table 3:DC characteristics Over Recommended Operating ConditionsSymbolDescriptionMinTyp(1)MaxU nitsVDRINTData retention VCCINT voltage (below which configuration data might be lost) VVDRIData retention VCCAUX voltage (below which configuration data might be lost) VIREFVREF leakage current per pin 15 AILI nput or output leakage current per pin (sample-tested) 15 ACIN(2)Die input capacitance at the pad 8pFIRPUPad pull-up (when selected) @ VIN=0V, VCCO= 330 APad pull-up (when selected) @ VIN=0V, VCCO= 250 APad pull-up (when selected) @ VIN=0V, VCCO= 220 APad pull-up (when selected) @ VIN=0V, VCCO= 150 APad pull-up (when selected) @ VIN=0V, VCCO= 120 AIRPDPad pull-down (when selected) @ VIN= 330 AICCADCA nalog supply current, analog circuits in powered up state 25mAIBATT(3)Battery supply current 150nARIN_TERM(4)

8 Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_40)284055 Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_50)355065 Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_60)446083 Table 2:Recommended Operating Conditions(1)(2) (Cont d)SymbolDescriptionMinTypMaxUnitsSend FeedbackArtix-7 FPGAs data sheet : DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification4nTemperature diode ideality factor rTemperature diode series resistance 2 Notes: values are specified at nominal voltage, 25 measurement represents the die capacitance at the pad, not including the value specified for worst case process at 25 resistance to a VCCO/2 4:VIN Maximum Allowed AC Voltage Overshoot and Undershoot for HR I/O Banks(1)(2)AC Voltage Overshoot% of UI @ 55 C to 125 CAC Voltage Undershoot% of UI @ 55 C to 125 CVCCO+ + + + + + + + + : total of 200 mA per bank should not be peak voltage of the overshoot or undershoot, and the duration above VCCO+ or below GND , must not exceed the values in this 3:DC characteristics Over Recommended Operating Conditions (Cont d)SymbolDescriptionMinTyp(1)MaxUnitsSend FeedbackArtix-7 FPGAs data sheet : DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification5 Table 5.

9 Typical Quiescent Supply CurrentSymbolDescriptionDeviceSpeed VCCINT supply currentXC7A12T484848484338mAXC7A15T95959 5955866mAXC7A25T484848484338mAXC7A35T959 595955866mAXC7A50T959595955866mAXC7A75T1 5515515515596108mAXC7A100T15515515515596 108mAXC7A200T328328328328203232mAXA7A15T N/A95N/A95N/AN/AmAXA7A35TN/A95N/A95N/AN/ AmAXA7A50TN/A95N/A95N/AN/AmAXA7A75TN/A15 5N/A155N/AN/AmAXA7A100TN/A155N/A155N/AN/ AmAXQ7A50TN/A95N/A9558N/AmAXQ7A100TN/A15 5N/A15596N/AmAXQ7A200TN/A328N/A328203N/A mAICCOQQ uiescent VCCO supply currentXC7A12T111111mAXC7A15T111111mAXC7 A25T111111mAXC7A35T111111mAXC7A50T111111 mAXC7A75T444444mAXC7A100T444444mAXC7A200 T555555mAXA7A15TN/A1N/A1N/AN/AmAXA7A35TN /A1N/A1N/AN/AmAXA7A50TN/A1N/A1N/AN/AmAXA 7A75TN/A4N/A4N/AN/AmAXA7A100TN/A4N/A4N/A N/AmAXQ7A50TN/A1N/A11N/AmAXQ7A100TN/A4N/ A44N/AmAXQ7A200TN/A5N/A55N/AmASend FeedbackArtix-7 FPGAs data sheet : DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification6 ICCAUXQQ uiescent VCCAUX supply currentXC7A12T131313131313mAXC7A15T22222 2221922mAXC7A25T131313131313mAXC7A35T222 222221922mAXC7A50T222222221922mAXC7A75T3 63636363236mAXC7A100T363636363236mAXC7A2 00T737373736573mAXA7A15TN/A22N/A22N/AN/A mAXA7A35TN/A22N/A22N/AN/AmAXA7A50TN/A22N /A22N/AN/AmAXA7A75TN/A36N/A36N/AN/AmAXA7 A100TN/A36N/A36N/AN/AmAXQ7A50TN/A22N/A22 19N/AmAXQ7A100TN/A36N/A3632N/AmAXQ7A200T N/A73N/A7365N/AmAICCBRAMQQ uiescent VCCBRAM supply currentXC7A12T111111mAXC7A15T222212mAXC7 A25T111111mAXC7A35T222212mAXC7A50T222212 mAXC7A75T444424mAXC7A100T444424mAXC7A200 T11111111611mAXA7A15TN/A2N/A2N/AN/AmAXA7 A35TN/A2N/A2N/AN/AmAXA7A50TN/A2N/A2N/AN/ AmAXA7A75TN/A4N/A4N/AN/AmAXA7A100TN/A4N/ A4N/AN/AmAXQ7A50TN/A2N/A21N/AmAXQ7A100TN /A4N/A42N/AmAXQ7A200TN/A11N/A116N/AmANot es.

10 Values are specified at nominal voltage, 85 C junction temperature (Tj) with single-ended SelectIO values are for blank configured devices with no output current loads, no active input pull-up resistors, all I/O pins are 3-state and the xilinx Power Estimator (XPE) spreadsheet tool (download at ) to estimate static power consumption for conditions other than those 5:Typical Quiescent Supply Current (Cont d)SymbolDescriptionDeviceSpeed FeedbackArtix-7 FPGAs data sheet : DC and AC Switching CharacteristicsDS181 ( ) December 21, Specification7 Power-On/Off Power Supply SequencingThe recommended power-on sequence is VCCINT, VCCBRAM, VCCAUX, and VCCO to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on sequence. If VCCINT and VCCBRAM have the same recommended voltage levels then both can be powered by the same supply and ramped simultaneously.