Bidirectional Symmetrical (BiSy) Low Capacitance, Single ...

1 Semiconductors Rev. , 16-May-171 Document Number: 81188 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Symmetrical (BiSy) Low Capacitance, Single -Line ESD Protection Diode in LLP1006-2 MMARKING (example only)Bar = pin 1 marking X = date code Y = type code (see table below)DESIGN SUPPORT TOOLS click logo to get startedFEATURES Ultra compact LLP1006-2M package Low package height < mm 1-line ESD protection Working range V Low leakage current IR < A Very low load capacitance CD = pF ESD immunity acc.

2 IEC 61000-4-2 15 kV contact discharge 16 kV air discharge Soldering can be checked by standard vision inspection; no X-ray necessary Pin plating NiPdAu (e4) no whisker growth e4 - precious metal ( Ag, Au, NiPd, NiPdAu) (no Sn) PATENT(S): Material categorization: for definitions of compliance please see (S): This vishay product is protected by one or more United States and international INFORMATIONDEVICE NAMEORDERING CODETAPED UNITS PER REEL(8 mm TAPE ON 7" REEL)MINIMUM ORDER QUANTITYVBUS05L1-DD1 VBUS05L1-DD1-G-0880008000 PACKAGE DATADEVICE NAMEPACKAGE NAMETYPE CODEWEIGHTMOLDING COMPOUND FLAMMABILITY RATINGMOISTURE SENSITIVITY LEVELSOLDERING CONDITIONSVBUS05L1-DD1 mgUL 94 V-0 MSL level 1(according J-STD-020)260 C/10 s at terminalsABSOLUTE MAXIMUM RATINGS VBUS05L1-DD1 PARAMETERTEST CONDITIONSSYMBOLVALUEUNITPeak pulse currentAcc.

3 IEC 61000-4-5; tp = 8/20 s; Single shotIPPM2 APeak pulse powerPin 1 to pin 2, acc. IEC 61000-4-5; tp = 8/20 s; Single shotPPP34 WESD immunityContact discharge acc. IEC 61000-4-2; 10 pulsesVESD 15kVAir discharge acc. IEC 61000-4-2; 10 pulses 16kVOperating temperatureJunction temperatureTJ-40 to +125 CStorage temperatureTSTG-40 to +150 Semiconductors Rev. , 16-May-172 Document Number: 81188 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT : ESD PROTECTION WITH LOWEST LOAD CAPACITANCEThe VBUS05L1-DD1 is a Bidirectional and Symmetrical (BiSy) ESD protection device which clamps positive and negative overvoltage transients to ground.

4 Connected between the signal or data line and the ground the VBUS05L1-DD1 offers a high isolation (low leakage current, lowest capacitance) within the specified working range. Due to the short leads and small package size of the tiny LLP1006-2M package the line inductance is very low, so that fast transients like an ESD strike can be clamped with minimal over- or CHARACTERISTICS (Tamb = 25 C, unless otherwise specified)Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF)Fig. 2 - 8/20 s Peak Pulse Current Wave Form acc. IEC 61000-4-5 ELECTRICAL CHARACTERISTICS VBUS05L1-DD1 (Tamb = 25 C, unless otherwise specified)PARAMETERTEST pathsNumber of lines which can be protectedNchannel--1linesReverse stand-off voltageMax.

5 Reverse working voltageat IR = currentat VRWM = AReverse breakdown voltageat IR = 1 clamping voltageat IPP 1 Vat IPP = IPPM = 2 AVC-1417 VCapacitanceat VR = 0 V, f = 1 VR = V, f = 1 pF10100100010000020406080100120-10 0 10 20 30 40 50 60 70 80 90 100 Axis Title1st line2nd line2nd lineIESD(%)t (ns)2nd lineRise time = ns to 1 ns53272055710100100010000020406080100010 203040 Axis Title1st line2nd line2nd lineIPPM(%)t ( s)2nd line20 s to 50 %8 s to 100 % Semiconductors Rev. , 16-May-173 Document Number: 81188 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT 3 - Typical Capacitance CD vs.

6 Reverse Voltage VRFig. 4 - Typical Reverse Voltage VR vs. Reverse Current IRFig. 5 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPPFig. 6 - Typical Clamping Performance at + 8 kVContact Discharge (acc. IEC 61000-4-2)Fig. 7 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2)Fig. 8 - Typical Peak Clamping Voltage at ESDC ontact Discharge (acc. IEC 61000-4-2)VR (V)CD (pF) = 1 MHzboth polaritiesIR ( A)VR (V) 1000 10 000 Both polaritiesIPP (A)VC (V) acc. IEC 61000-4-5(8/20 s - wave form)Both polaritiest (ns)VC-ESD (V)21866-20020406080100120140-10 0 102030405060708090 Acc. IEC 61000-4-2+8 kV contact discharget (ns)VC-ESD (V)21867-140-120-100-80-60-40-20020-10 0 102030405060708090 Acc.

7 IEC 61000-4-2-8 kV contact dischargeVESD (kV)VC-ESD (V)21868-200-150-100-5005010015020002468 1012 Acc. IEC 61000-4-2contact Semiconductors Rev. , 16-May-174 Document Number: 81188 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT DIMENSIONS in millimeters (inches): [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] Foot print recommendation: 1 [ ] Solder resist maskSolder padDocument no.: (4)Rev. 7 - Date: 201620812 [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ]0 [ ] [ ] [ ] ref. Orientation [ ]Pad Design Patented: US B2)P(LLP1006-2 XTop viewPad layout - view from topseen at bottom sideUnreeling (4) Disclaimer Revision: 08-Feb-171 Document Number: 91000 Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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