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Chapter 4 BJT BIASING CIRCUIT

Chapter 4 BJT BIASING CIRCUITI ntroduction BiasingThe analysis or design of a transistor amplifier requires knowledge of both the dc and ac response of the system. In fact, the amplifier increases the strength of a weak signal by transferring the energy from the applied DC source to the weak input ac signal The analysis or design of any electronic amplifier therefore has two components: The dc portion and The ac portion During the design stage, the choice of parameters for the required dc levels will affect the ac is BIASING CIRCUIT ? BIASING : Application of dc voltages to establish a fixed level of current and of the DC BIASING CIRCUIT To turn the device ON To place it in operation in the region of its characteristic where the device operates most linearly.

almost same as the current I2 through R.2 Thus R1 and R2 can be considered as in series. Voltage divider can be applied to find the voltage across R2 ( VB) Approximate Analysis ... Applying Kirchoffs voltage law: I. E + V. CE + I’ ...

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Transcription of Chapter 4 BJT BIASING CIRCUIT

1 Chapter 4 BJT BIASING CIRCUITI ntroduction BiasingThe analysis or design of a transistor amplifier requires knowledge of both the dc and ac response of the system. In fact, the amplifier increases the strength of a weak signal by transferring the energy from the applied DC source to the weak input ac signal The analysis or design of any electronic amplifier therefore has two components: The dc portion and The ac portion During the design stage, the choice of parameters for the required dc levels will affect the ac is BIASING CIRCUIT ? BIASING : Application of dc voltages to establish a fixed level of current and of the DC BIASING CIRCUIT To turn the device ON To place it in operation in the region of its characteristic where the device operates most linearly.

2 Proper BIASING CIRCUIT which it operate in linear region and CIRCUIT have centered Q-point or midpoint biased Improper BIASING cause Improper BIASING cause Distortion in the output signal Produce limited or clipped at output signalImportant basic relationshipECBI II= +CBII = ( 1)EBCIII =+ CBCEBEV VV= Operating Point Active or Linear Region Operation Base Emitter junction is forward biased Base Collector junction is reverse biased Good operating point Saturation Region Operation Base Emitter junction is forward biased Base Collector junction is forward biased Cutoff Region Operation Base Emitter junction is reverse biased BJT AnalysisDC analysis Calculate the DC Q-point solving input and output loopsGraphical MethodAC analysisCalculate gains of the amplifierDC BIASING Circuits Fixed-bias CIRCUIT Emitter-stabilized bias CIRCUIT Collector-emitter loop Voltage divider bias CIRCUIT DC bias with voltage feedback FIXED BIAS CIRCUIT This is common emitter (CE)

3 Configuration 1ststep: Locate capacitors and replace them with an open CIRCUIT 2ndstep: Locate 2 main loops which; BE loop (input loop) CE loop(output loop)FIXED BIAS CIRCUIT 1ststep: Locate capacitors and replace them with an open circuitFIXED BIAS CIRCUIT 2ndstep: Locate 2 main LoopCE LoopFIXED BIAS CIRCUIT BE Loop Analysis1 From KVL;IB0 CCBBBCCBEBBEVVIVRVIR =+ +=AFIXED BIAS CIRCUIT CE Loop Analysis From KVL; As we known; Substituting withBCII =2IC0 CCCCCECECCCCVIR VVVIR + + = = BAB =BBECCDCCRVVI Note that does not affect the value of IcCRFIXED BIAS CIRCUIT DISADVANTAGE Unstable because it is too dependent on and produce width change of Q-point For improved bias stability , add emitter resistor to dc line analysis A fixed bias CIRCUIT with given values of VCC,RC and RB can be analyzed ( means, determining the values of IBQ, ICQ and VCEQ) using the concept of load line also.

4 Here the input loop KVL equation is not used for the purpose of analysis, instead, the output characteristics of the transistor used in the given CIRCUIT and output loop KVL equation are made use Load LineCutoff RegionSaturation RegionQ-Point Plot load line equation IC(sat) occurs when transistor operating in saturation region VCE(off) occurs when transistor operating in cut-off regionCECCCCVVIR= 0==CEsatVCCCCRVI0)(= =CoffICCCCCERIVVC ircuit Values Affect t he Q-PointDecreasing VccIncreasing RcVarying IbEMITTER-STABILIZED BIAS CIRCUIT An emitter resistor, REis added to improve stability 1ststep: Locate capacitors and replace them with an open CIRCUIT 2ndstep: Locate 2 main loops which; BE loop CE loopResistor, REaddedEMITTER-STABILIZED BIAS CIRCUIT 1ststep: Locate capacitors and replace them with an open circuitEMITTER-STABILIZED BIAS CIRCUIT 2ndstep: Locate 2 main LoopCE Loop1 EMITTER-STABILIZED BIAS CIRCUIT BE Loop Analysis From kvl;Recall;Substitute for IE0 CCBBBEEEVIR VIR + + + =(1)0(1)CCBBBEBECCBEBBEVIR VIRVVIRR + + ++ = =++BEII)1(+= 1 EMITTER-STABILIZED BIAS CIRCUIT CE Loop Analysis From KVL; Assume; Therefore.

5 CEII 0 CCCCCEEEVIR VIR + ++ =2)(ECCCCCERRIVV+ = Improved Bias StabilityThe addition of the emitter resistor to the dc bias of the BJT provides improved stability, that is, the dc bias currents and voltages remain closer to where they were set by the CIRCUIT when outside conditions, such as temperature, and transistor beta, change. (1)CCBEcBEVVIRR = ++ Without ReWith ReCCBEcBVVIR = Note:it seems that beta in numerator canceled with beta in denominator VOLTAGE DIVIDER BIAS CIRCUIT Provides good Q-point stability with a single polarity supply voltage This is the BIASING CIRCUIT wherein, ICQ and VCEQ are almost independent of beta. The level of IBQ will change with beta so as to maintain the values of ICQ and VCEQ almost same, thus maintaining the stability of Q point.

6 Two methods of analyzing a voltage divider bias CIRCUIT are: Exact method : can be applied to any voltage divider CIRCUIT Approximate method : direct method, saves time and energy, 1ststep: Locate capacitors and replace them with an open CIRCUIT 2ndstep: Simplified CIRCUIT using TheveninTheorem 3rdstep: Locate 2 main loops which; BE loop CE loopVOLTAGE DIVIDER BIAS CIRCUITS implified CircuitThevenin Theorem; 2ndstep: : Simplified CIRCUIT using Thevenin Theorem212121//RRRRRRRTH+ ==CCTHVRRRV212+=From Thevenin Theorem;VOLTAGE DIVIDER BIAS CIRCUIT 2ndstep: Locate 2 main LoopCE Loop12 VOLTAGE DIVIDER BIAS CIRCUIT BE Loop Analysis From KVL;Recall;Substitute for IE0 THBTHBEEEVIRVIR + + + =(1)0(1)THBTHBEBETHBEBRTHEVIRVIRVVIRR + + ++ = =++BEII)1(+= 1 VOLTAGE DIVIDER BIAS CIRCUIT CE Loop Analysis From KVL; Assume; Therefore;CEII 0 CCCCCEEEVIR VIR + ++ =)(ECCCCCERRIVV+ = 2 Approximate analysis:2222(1)10iRbEERR IRRIRR + > If this condition applied then you can use approximation method.

7 This makes IB to be negligible. Thus I1 through R1 is almost same as the current I2 through R1 and R2 can be considered as in divider can be applied to find the voltage across R2 ( VB)Approximate AnalysisThen IB<< I2and I1 I2 :When RE> 10R2,From Kirchhoff s voltage law:21CC2 BRRVRV+=EEERVI=BEBEVVV =EECCCCCERI RI V V = )R (RIV VIIECCCCCECE+ = This is a very stable bias CIRCUIT . The currents and voltages are nearly independent ofany variations in .DC Bias with Voltage FeedbackAnother way to improve the stability of a bias CIRCUIT is to add a feedback path from collector to base. In this bias CIRCUIT the Q-point is only slightly dependent on the transistor beta, . Base-Emitter Loop)R(RRVVIECBBECCB+ + =From Kirchhoff s voltage law:CCCC BB BE EE-V + I R +I R +V +I R0 =Where IB<< IC:CIBICICI' +=Knowing IC= IBand IE IC, the loop equation becomes: 0 RIVRIRI VEBBEBBCBCC= Solving for IB:Collector-Emitter LoopApplying kirchoff svoltage law:IE+ VCE+ I CRC VCC= 0 Since I C ICand IC= IB:IC(RC+ RE) + VCE VCC=0 Solving for VCE:VCE= VCC IC(RC+ RE)


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