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Computer Systems Organization and Architecture

SOLUTIONS MANUALC omputer Systems Organizationand ArchitectureJohn D. CarpinelliCopyright 2001, Addison Wesley Longman - All Rights ReservedComputer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage iiTable of ContentsChapter Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 1 Chapter + y y + z(x + y )(y + z)xyxzy zxy + xz + y z000100000000111100110100100000011010000 0100100000010111101111101111001111111110 12. a)wxyzwxxzy wx + xz + y b)wxyzw + x + y + z000000110000000010011000110010000000101 0011000000111010000110100101010111010110 1100000011010111010101111100000111000110 0100111001110100000101011011000010111110 0101111001110111111101111101001111011111 110111111 c)wxyzw x yzw xyzw x yz w xyz w x yz + w xyz + w x yz + w xyz 0000000000001000000010001010011100010100 0000001010000001100001101110100110000000 0100100000101000000101100000110000000110 100000111000000111100000 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage (ab) a b a + b aba + b(a + b) a b a b 0001111000111101011010110100100101110100 10111000011100004.

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1 SOLUTIONS MANUALC omputer Systems Organizationand ArchitectureJohn D. CarpinelliCopyright 2001, Addison Wesley Longman - All Rights ReservedComputer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage iiTable of ContentsChapter Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 1 Chapter + y y + z(x + y )(y + z)xyxzy zxy + xz + y z000100000000111100110100100000011010000 0100100000010111101111101111001111111110 12. a)wxyzwxxzy wx + xz + y b)wxyzw + x + y + z000000110000000010011000110010000000101 0011000000111010000110100101010111010110 1100000011010111010101111100000111000110 0100111001110100000101011011000010111110 0101111001110111111101111101001111011111 110111111 c)wxyzw x yzw xyzw x yz w xyz w x yz + w xyz + w x yz + w xyz 0000000000001000000010001010011100010100 0000001010000001100001101110100110000000 0100100000101000000101100000110000000110 100000111000000111100000 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage (ab) a b a + b aba + b(a + b) a b a b 0001111000111101011010110100100101110100 10111000011100004.

2 A) w' + x' + y' + z'b) w' + x' + y'zc) (w' + x') + (w' + y') + (w' + z') + (x' + y') + (x' + z') + (y' + z') = w' + x' + y' + z'5. a)wx\yz00011110 b)wx\yz000111100011000011010101100111101 10011111110101001101001w x y + w xz + wxy + wx z x z + w y + xz + xy or orx y z + w y z + xyz + wyz x z + w y + xz + y z 6. a)wx\yz00011110 b)wx\yz0001111000100100X11X011X11010XX01 101X01100X0100XX010 XXXX w z + xy x 7. a)wx\yz00011110 b)wx\yz00011110 c)wx\yz000111100001000010000001010101100 1110001101011111111110111010110000010100 1101010wx + xz + w y z y z + xy + wz Already minimal8. a)b)c)9. wxy + wxz + w xy + xyz :wx\yz00011110000000010011111111100000 wx + xyComputer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 310. a)b) the AND gates to NAND gates.

3 The rest of the circuit is the tri-state buffers and do one of the following:a) Change each 2-input AND gate to a 3-input AND gate. Each gates' inputs should be its two originalinputs and E, orb) Have each AND gate's output serve as an input to another 2-input AND gate, one gate for each originalAND gate. The second input to the new 2-input AND gates is Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 415. Set up Karnaugh maps for each output, then develop minimal logic expressions and design the appropriatelogic > Y:X1X0\Y1Y000011110X = Y:X1X0\Y1Y000011110X < Y:X1X0\Y1Y000011110000000001000000111011000010100010011111101110010110000101100100001100010(X > Y) = X1Y1' + X0Y1'Y0' + X1X0Y0'(X = Y) = X1'X0'Y1'Y0' + X1'X0Y1'Y0 + X1X0'Y1Y0' + X1X0Y1Y0 = (X1 Y1)'(X0 Y0)'(X < Y) = X1'Y1 + X1'X0'Y0 + X0' = X2Y2 + (X2 Y2)(X1Y1 + (X1 Y1)(X0Y0 + (X0 Y0)C0))C4 = X3Y3 + (X3 Y3)(X2Y2 + (X2 Y2)(X1Y1 + (X1 Y1)(X0Y0 + (X0 Y0)C0))) Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 518X3X2\X1X000011110X3X2\X1X000011110001 01100100101010101000111 XXXX11 XXXX1010XX1010XX d = X2'X0' + X2'X1 + X1X0' + X2X1'X0e = X2'X0' + X1X0'X3X2\X1X000011110X3X2\X1X0000111100 0100000001101110101110111 XXXX11 XXXX1011XX1011XX f = X3 + X2X0' + X2X1' + X1'X0' g = X3 + X2X0' + X1X0' + X2' :X3X2\X1X000011110b:X3X2\X1X000011110c.

4 X3X2\X1X00001111000010000000000000101100 001010101000011 XXXX11 XXXX11 XXXX1000XX1000XX1000 XXa = X3'X2'X1'X0 + X2X1'X0'b = X2X1'X0 + X2X1X0'c = X2'X1X0'd:X3X2\X1X000011110e:X3X2\X1X000 011110f:X3X2\X1X000011110000100000110000 11101101001111001001011 XXXX11 XXXX11 XXXX1001XX1001XX1000 XXd = X2X1'X0' + X2'X1'X0 + X2X1X0e = X2X1' + X0 f = X1X0 + X3'X2'X0 + X2'X1g:X3X2\X1X00001111000110001001011 XXXX1000 XXg = X3'X2'X1' + X2X1X0 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 620. The four inputs can be in one of 24 (= 4!) possible orders. Since each sorter has two possible states (MAX= X MIN = Y, or MAX = Y MIN = X), n sorters can have up to 2n states. Four sorters can have only 24 = 16states, not enough to sort all 24 possible input orders. Five sorters have 25 = 32 states, which could besufficient. (This argument establishes a lower bound; it does not guarantee the existence of a 5-sorternetwork that can sort four inputs.)

5 Since the sorting network of Figure (b) matches this bound, it is aminimal network.)21. a)b) flip-flop is clocked if the increment signal and clock are asserted, and all flip-flops to its right are Each clock is driven by Q of the flip-flop to its right instead of Q'. The clock of the rightmost flip-flop isunchanged. All other signals are :X2\X1X000011110J1:X2\X1X000011110J0:X2\ X1X00001111000001001XX01XX01 XXXX100XX10XX1J2 = X1X0'J1 = X2'X0J0 = X2'X1' + X2X1K2:X2\X1X000011110K1:X2\X1X000011110 K0:X2\X1X0000111100 XXXX0XX000X01X110001XX101X10XK2 = X1'X0'K1 = X2X0K0 = X2'X1 + X2X1' Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 725. a)b)26. a)b) Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 8 Chapter 21. a)Present StateDNext State000011100111 b)Present StateTNext StateSRNext the following states to the state table.

6 Since all additions are self-loops, it is not necessary to changethe state StateCI1I0 Next StateRGASNOCAR001 SNOCAR100 SNOCAR010 SNOCAR100 SNOCAR011 SNOCAR100 SPAID101 SPAID010 SPAID110 SPAID010 SPAID111 SPAID010 SCHEAT001 SCHEAT101 SCHEAT010 SCHEAT101 SCHEAT011 SCHEAT101 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage (Mealy)Data (Moore) StateINext StateM0000000010100100000111001001101011 00110001111011N1 = P1'P0I + P1P0'N0 = P1'P0'I + P1P0'I' + P1P0IM = P1P0 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage (Mealy)Data (Moore) value assignments (P3 - P0):S0 = 0000S5 = 0001S10 = 0010S15 = 0011S20 = 0100S25 = 0101S30 = 0110 SPAID = 0111 SNOCAR = 1000 SCHEAT = 1001N3 = C'N2 = P3'CI1I0 + P3'(P2 + P1)CI1I0' + P3'(P2 + P1P0)CI1'I0 + P2CI1'I0'N1 = P3'(P2 + P1 + P0)CI1I0 + P3'(P2 + P1')CI1I0' + P3'(P1'P0 + P1P0' + P2P1P0)CI1'I0 + P1P0CI1'I0'N0 = P3'(P2 + P1 + P0')CI1I0 + P3'(P0 + P2P1)CI1I0' + P3'(P0' + P2P1)CI1'I0 + P3'P0CI1'I0' + P3P0C + P3'(P2' + P1' + P0')C'R = SPAID'G = SPAIDA = value assignments (P3 - P0).

7 S0 = 0000S5 = 0001S10 = 0010S15 = 0011S20 = 0100S25 = 0101S30 = 0110 SPAID = 0111 SNOCAR = 1000 SCHEAT = 1001N3 = C'N2 = P3'CI1I0 + P3'(P2 + P1)CI1I0' + P3'(P2 + P1P0)CI1'I0 + P2CI1'I0'N1 = P3'(P2 + P1 + P0)CI1I0 + P3'(P2 + P1')CI1I0' + P3'(P1'P0 + P1P0' + P2P1P0)CI1'I0 + P1P0CI1'I0'N0 = P3'(P2 + P1 + P0')CI1I0 + P3'(P0 + P2P1)CI1I0' + P3'(P0' + P2P1)CI1'I0 + P3'P0CI1'I0' + P3P0C + P3'(P2' + P1' + P0')C'R = G'G = P3'(P2 + P1)CI1I0 + P3'P2P0CI1 + P3'P2P1C(I1 + I0) + P3'P2P1P0CA = P3'(P2 + P1 + P0)C' Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage 1001101 1001101 1001101 0000100 0001100 0010100 01011000001 XXX1001101 1001101 1001101 1001101 0001100 0010100 0011100 01101000010 XXX1001101 1001101 1001101 1001101 0010100 0011100 0100100 01110100011 XXX1001101 1001101 1001101 1001101 0011100 0100100 0101100 01110100100 XXX1001101 1001101 1001101 1001101 0100100 0101100 0110100 01110100101 XXX1001101 1001101 1001101 1001101 0101100 0110100 0111010 01110100110 XXX1001101 1001101 1001101 1001101 0110100 0111010 0111010 01110100111 XXX1000100 1000100 1000100 1000100 0111010 0111010 0111010 01110101000 XXX1000100 1000100 1000100 1000100 0000100 0000100 0000100 00001001001 XXX1001101 1001101 1001101 1001101 0000100 0000100 0000100 00001001010 XXX1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001011 XXX1000100 1000100 1000100

8 1000100 1000100 1000100 1000100 10001001100 XXX1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001101 XXX1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001110 XXX1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001111 XXX1000100 1000100 1000100 1000100 1000100 1000100 1000100 100010013. N2:P2P1\P0U00011110N1:P2P1\P0U00011110 N2:P2P1\P0U00011110000000000010000101010 0100111010101011100001100001100001011011 0000010010114. The next state logic is the same as for the Moore = P2P0' + P2U' + P1P0UN1 = P1P0' + P1U' + P2'P1'P0UN0 = P0'U + P0U'C = P2'P1'P0'U' + P2P1'P0UV2 = P2'P1P0U + P2P1'P0' + P2P1'P0U'V1 = P2'P1'P0U + P2'P1P0' + P2'P1P0U'V0 = (P2' + P1')P0'U + (P2' + P1)P0U' possible next state values are already Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage value assignments (P3 - P0):S0 = 0000S5 = 0001S10 = 0010S15 = 0011S20 = 0100S25 = 0101S30 = 0110 SPAID = 0111 SNOCAR = 1000 SCHEAT = 1001SA = 1010SB = 1011SC = 1100SD = 1101 SE = 1110 SF = 1111 Add to state table:Present StateCI1I0 Next StateRGA1010 XXX10000001011 XXX10000001100 XXX10000001101 XXX10000001110 XXX10000001111 XXX1000000 Add to state diagram.

9 N3 = C' + P3(P2 + P1)N2 = P3'CI1I0 + P3'(P2 + P1)CI1I0' + P3'(P2 + P1P0)CI1'I0 + P2CI1'I0'N1 = P3'(P2 + P1 + P0)CI1I0 + P3'(P2 + P1')CI1I0' + P3'(P1'P0 + P1P0' + P2P1P0)CI1'I0 + P1P0CI1'I0'N0 = P3'(P2 + P1 + P0')CI1I0 + P3'(P0 + P2P1)CI1I0' + P3'(P0' + P2P1)CI1'I0 + P3'P0CI1'I0' + P3P0C + P3'(P2' + P1' + P0')C'R = SPAID'G = SPAIDA = = P2P1P0U' + P3(P2' + P1' + P0' + U)N2 = P3P2(P0 + U) + P2P1 + P3'P1P0'U'N1 = P3' (P2 + P1)U' + P2P1P0U' + P1UN0 = (P3' + P2)P1'U + P3'P2U + P0U'C = P2'P1'P0'V2 = P3P1'P0 + P3P2P0'V1 = P3'P1P0' + P2P1P0V0 = P3'P2'P0 + P2P1P0 + P3P1'P0 Computer Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage Systems Organization and Architecture - Solutions ManualCopyright 2001 Addison Wesley - All Rights ReservedPage are of the form ABCYZ, where A|B|C = 0 if a player may signal, or 1 if the player may not signal. YZrepresents the player answering the question (01 = player 1, 10 = player 2, 11 = player 3, 00 = no player).

10 Although not shown in the diagram, there is an arc from every state back to state 00000 with condition XX1X00000 00000110 XX0000110 01010010 XX0010010 01000000 000X00000 00000110 XX0101100 01010010 XX0111000 01000000 010X00001 00001000 X00X01000 00010011 XX0010011 00100000 100X00010 00001000 010X01001 00010011 XX0110100 00100000 110X00011 00001000 110X01011 00010100 0X0X10100 00000001 XX0000001 10001001 XX0001001 10010100 100X10110 00000001 XX0110000 10001001 XX0111000 10010100 110X10100 00000010 XX0000010 01001011 XX0001011 00110110 XX0010110 01000010 XX0101000 01001011 XX0101100 00110110 XX0111100 01000011 XX0000011 00101100 000X01100 00011000 0X0X11000 00000011 XX0100100 00101100 010X01101 00011000 100X11000 00000100 000X00100 00001100 1X0X01100 00011000 110X11011 00000100 010X00101 00001101 XX0001101 10011011 XX0011011 00100100 100X00110 00001101 XX0111100 10011011 XX0111100 00100100 110X00100 00010000 0X0X10000 00011100 XX0X11100 00000101


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