Digital Design

1 Digital DesignWith an Introduction to the Verilog HDLThis page intentionally left blank Digital Design With an Introduction to the Verilog HDL FIFTH EDITION M. Morris Mano Emeritus Professor of Computer Engineering California State University, Los Angeles Michael D. Ciletti Emeritus Professor of Electrical and Computer Engineering University of Colorado at Colorado Springs Upper Saddle River Boston Columbus San Franciso New YorkIndianapolis London Toronto Sydney Singapore Tokyo MontrealDubai Madrid Hong Kong Mexico City Munich Paris Amsterdam Cape Town Library of Congress Cataloging-in-Publication Data Mano, M.

2 Morris, 1927 Digital Design : with an introduction to the verilog hdl / M. Morris Mano, Michael D. Ciletti. 5th ed. p. cm. Includes index. ISBN-13: 978-0-13-277420-8 ISBN-10: 0-13-277420-8 1. Electronic Digital computers Circuits. 2. Logic circuits. 3. Logic Design . 4. Digital integrated circuits. I. Ciletti, Michael D. II. Title. 2011 '5 dc23 2011039094 Vice President and Editorial Director, ECS: Marcia J. HortonExecutive Editor: Andrew GilfillanVice-President, Production: Vince O BrienExecutive Marketing Manager: Tim GalliganMarketing Assistant: Jon BryantPermissions Project Manager: Karen SanatarSenior Managing Editor: Scott DisannoProduction Project Manager/Editorial Production Manager: Greg DullesCover Designer: Jayne ConteCover Photo: Michael D.

3 CilettiComposition: Jouve India Private LimitedFull-Service Project Management: Jouve India Private LimitedPrinter/Binder: Edwards BrothersTypeface: Times Ten 10/12 Copyright 2013, 2007, 2002, 1991, 1984 Pearson Education, Inc., publishing as Prentice Hall, One Lake Street, Upper Saddle River, New Jersey 07458. All rights reserved. Manufactured in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any means, electronic, mechanical, photocopying, recording, or likewise.

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5 , Blacksburg, VA 24062 author and publisher of this book have used their best efforts in preparing this book. These efforts include the development, research, and testing of the theories and programs to determine their effectiveness. The author and publisher make no warranty of any kind, expressed or implied, with regard to these programs or the documentation contained in this book. The author and publisher shall not be liable in any event for incidental or consequential damages in connection with, or arising out of, the furnishing, performance, or use of these programs.

6 About the cover: Spider Rock in Canyon de Chelley, Chinle, Arizona, USA, January 2011. Photograph courtesy of mdc Images, LLC ( ). Used by 9 8 7 6 5 4 3 2 1 ISBN-13: 978-0-13-277420-8 ISBN-10: 0-13-277420-8v Preface ix 1 Digital Systems and Binary Numbers 1 Digital Systems 1 Binary Numbers 3 Number Base Conversions 6 Octal and Hexadecimal Numbers 8 Complements of Numbers 10 Signed Binary Numbers 14 Binary Codes

7 18 Binary Storage and Registers 27 Binary Logic 30 2 Boolean Algebra and Logic Gates 38 Introduction 38 Basic Definitions 38 Axiomatic Definition of Boolean Algebra 40 Basic Theorems and Properties of Boolean Algebra 43 Boolean Functions 46 Canonical and Standard Forms 51 Other Logic Operations 58 Digital Logic Gates 60 Integrated Circuits 66 Contents vi Contents 3 Gate Level Minimization 73 Introduction 73 The Map Method 73 Four Variable K-Map 80 Product of Sums

8 Simplification 84 Don t Care Conditions 88 NAND and NOR Implementation 90 Other Two Level Implementations 97 Exclusive OR Function 103 Hardware Description Language 108 4 Combinational Logic 125 Introduction 125 Combinational Circuits 125 Analysis Procedure 126 Design Procedure 129 Binary Adder Subtractor 133 Decimal Adder 144 Binary Multiplier 146 Magnitude Comparator 148

9 Decoders 150 Encoders 155 Multiplexers 158 HDL Models of Combinational Circuits 164 5 Synchronous Sequential Logic 190 Introduction 190 Sequential Circuits 190 Storage Elements: Latches 193 Storage Elements: Flip Flops 196 Analysis of Clocked Sequential Circuits 204 Synthesizable HDL Models of Sequential Circuits 217 State Reduction and Assignment 231 Design Procedure 236 6 Registers and Counters 255 Registers 255 Shift Registers 258 Ripple Counters

10 266 Synchronous Counters 271 Other Counters 278 HDL for Registers and Counters 283 Contents vii 7 Memory and Programmable Logic 299 Introduction 299 Random Access Memory 300 Memory Decoding