Embedded Peripherals IP User Guide - Intel

1 Embedded Peripherals IP User GuideUpdated for Intel Quartus Prime Design Suite: FeedbackUG-01085 | document on the web: PDF | HTMLC ontents1. Embedded Peripherals IP User Guide Tool Device Embedded Peripheral IP User Guide Introduction Revision Avalon-ST Multi-Channel Shared Memory FIFO Core Performance and Resource Functional Software Programming HAL System Library Register Avalon-ST Multi-Channel Shared Memory FIFO Core Revision Avalon-ST Single-Clock and Dual-Clock FIFO Core Functional Operating Fill Register Avalon-ST Single-Clock and Dual-Clock FIFO Core Revision Avalon-ST Serial Peripheral Interface Core Functional Avalon-ST Serial Peripheral Interface Core Revision 365. SPI Core Functional Example Transmitter Receiver Master and Slave Master/Slave Data Register Peripherals IP User GuideSend Timing Software Programming Hardware Access Software Register SPI Core Revision SPI Slave/JTAG to Avalon Master Bridge Core Functional SPI Slave/JTAG to Avalon Master Bridge Cores Revision Intel eSPI Slave Functional Link Transaction Channel Specific Port80 VW message to Physical Port Avalon-MM Interface Resource IP Interface Avalon-MM Interface Accessible eSPI Interface Accessible Peripheral Channel Avalon Interface Use Intel eSPI Slave Core Revision eSPI to LPC Bridge Unsupported LPC IP Supported IP Clock Functional FIFO Transaction

2 Ordering eSPI Command to LPC Cycle Type SERIRQ Interrupt Interface Status Error eSPI to LPC Bridge Core Revision 809. Ethernet MDIO Core Functional MDIO Frame Format (Clause 45).. MDIO Clock 83 ContentsSend FeedbackEmbedded Peripherals IP User Configuration Interface Ethernet MDIO Core Revision Intel FPGA 16550 Compatible UART Core Feature Unsupported General 16550 UART General Programming Flow Configuration DMA FPGA Resource Timing and Avalon-MM Over-run/Under-run Hardware Auto Clock and Baud Rate Software Programming Supported Unsupported 16550 UART Driver Address Map and Register Descriptions .. Intel FPGA 16550 Compatible UART Core Revision UART Core Functional Avalon-MM Slave Interface and RS-232 Transmitter Receiver Baud Rate Instantiating the Configuration Peripherals IP User GuideSend Software Programming HAL System Library Software Register Interrupt UART Core Revision 13612.

3 JTAG UART Core Functional Avalon Slave Interface and Read and Write JTAG Host-Target Configuration Software Programming HAL System Library Software Accessing the JTAG UART Core via a Host Register Interrupt JTAG UART Core Revision Intel FPGA Avalon Mailbox Core Functional Message Sending and Retrieval Component Register Component Component HAL Feature Intel FPGA Avalon Mailbox Core Revision Intel FPGA Avalon Mutex Core Functional Software Programming Software Hardware Access Mutex altera_avalon_mutex_is_mine().. altera_avalon_mutex_first_lock().. altera_avalon_mutex_lock().. altera_avalon_mutex_open().. altera_avalon_mutex_trylock().. altera_avalon_mutex_unlock().. Intel FPGA Avalon Mutex Core Revision FeedbackEmbedded Peripherals IP User Guide515.

4 Intel FPGA Avalon I2C (Master) Core Feature Supported Unsupported Configuration Register Memory Register Reset and Clock Functional Configuring TFT_CMD Register I2C Serial Interface Avalon-MM Slave Avalon-ST Programming Intel FPGA Avalon I2C (Master) Core Optional Status Retrieval Intel FPGA Avalon I2C (Master) Core Revision Intel FPGA I2C Slave to Avalon-MM Master Bridge Core Functional Block N-byte N-byte Addressing with N-bit Address Read Write Interacting with Platform Designer How to Translate the Bridge's I2C Data and I2C I/O Ports to an I2C Intel FPGA I2C Slave to Avalon-MM Master Bridge Core Revision Intel FPGA Avalon Compact Flash Core Functional Required Software Programming HAL System Library Software Register Intel FPGA Avalon Compact Flash Core Revision EPCS/EPCQA Serial Flash Controller Core Functional Avalon-MM Slave Interface and 202 ContentsEmbedded Peripherals IP User GuideSend Interface Software Programming HAL System Library Software Driver EPCS/EPCQA Serial Flash

5 Controller Core Revision History ..20619. Intel FPGA Serial Flash Controller Configuration Device I/O Chip Interface Register Memory Register Nios II Tools Booting Nios II from Nios II HAL Driver Intel FPGA Serial Flash Controller Core Revision Intel FPGA Serial Flash Controller II Configuration Device I/O Chip Interface Register Memory Register Nios II Tools Booting Nios II from Nios II HAL Driver Intel FPGA Serial Flash Controller II Core Revision 23421. Intel FPGA Generic QUAD SPI Controller Configuration Device I/O Chip Interface Register Memory Register Nios II Tools Nios II HAL Driver Intel FPGA Generic QUAD SPI Controller Core Revision 246 ContentsSend FeedbackEmbedded Peripherals IP User Guide722.

6 Intel FPGA Generic QUAD SPI Controller II Configuration Device Types .. I/O Chip Interface Register Memory Register Nios II Tools Nios II HAL Driver Intel FPGA Generic QUAD SPI Controller II Core Revision Interval Timer Core Functional Avalon-MM Slave Timeout Counter Hardware Configuring the Timer as a Watchdog Software Programming HAL System Library Software Register Interrupt Interval Time Core Interval Timer Core Revision On-Chip FIFO Memory Core Functional Avalon-MM Write Slave to Avalon-MM Read Avalon-ST Sink to Avalon-ST Avalon-MM Write Slave to Avalon-ST Avalon-ST Sink to Avalon-MM Read Status Clocking FIFO Interface Interface Software Programming HAL System Library Software Programming with the On-Chip FIFO Software

7 Software On-Chip FIFO Memory Peripherals IP User GuideSend altera_avalon_fifo_init().. altera_avalon_fifo_read_status().. altera_avalon_fifo_read_ienable().. altera_avalon_fifo_read_almostfull().. altera_avalon_fifo_read_almostempty().. altera_avalon_fifo_read_event().. altera_avalon_fifo_read_level().. altera_avalon_fifo_clear_event().. altera_avalon_fifo_write_ienable().. altera_avalon_fifo_write_almostfull().. altera_avalon_fifo_write_almostempty().. altera_avalon_write_fifo().. altera_avalon_write_other_info().. altera_avalon_fifo_read_fifo().. altera_avalon_fifo_read_other_info().. On-Chip FIFO Memory Core Revision On-Chip Memory (RAM and ROM) Core Component-Level Design for On-Chip Memory Read ROM/RAM Memory ECC Memory Platform Designer System-Level Design for On-Chip Simulation for On-Chip Intel Quartus Prime Project-Level Design for On-Chip Board-Level Design for On-Chip Example Design with On-Chip On-Chip Memory (RAM and ROM) Core Revision 28826.

8 Optrex 16207 LCD Controller Core Functional Software Programming HAL System Library Displaying Characters on the Software Register Interrupt Optrex 16207 LCD Controller Core Revision PIO Core Functional Data Input and Edge IRQ Example Avalon-MM FeedbackEmbedded Peripherals IP User Basic Input Software Programming Software Register Interrupt Software PIO Core Revision PLL Core Functional ALTPLL IP Clock PLL Status and Control System Reset Instantiating the Avalon ALTPLL Instantiating the PLL Hardware Simulation Register Definitions and Bit Status Control Phase Reconfig Control PLL Cores Revision DMA Controller Core Functional Setting Up DMA The Master Read and Write Addressing and Address DMA Parameters (Basic).

9 Advanced Software Programming HAL System Library Software Register Interrupt DMA Controller Core Revision Modular Scatter-Gather DMA Core Feature mSGDMA Interfaces and mSGDMA Parameter mSGDMA Read and Write Address Length Peripherals IP User GuideSend Sequence Number Read and Write Burst Count Read and Write Stride Control Register Map of Status Control Write Fill Level Read Fill Level Response Fill Level Write Sequence Number Read Sequence Number Component Configuration 1 Component Configuration 2 Component Type Component Version Programming Stop DMA Stop Descriptor Recovery from Stopped on Error and Stopped on Early Modular Scatter-Gather DMA Prefetcher Functional Driver

10 Example Code Using mSGDMA Modular Scatter-Gather DMA Core Revision 37131. Scatter-Gather DMA Controller Core Example Comparison of SG-DMA Controller Core and DMA Controller Resource Usage and FeedbackEmbedded Peripherals IP User Functional Functional Blocks and DMA Error Simulation Software Programming HAL System Library Software Register DMA Programming with SG-DMA Data SG-DMA alt_avalon_sgdma_do_async_transfer().. alt_avalon_sgdma_do_sync_transfer().. alt_avalon_sgdma_construct_mem_to_mem_de sc().. alt_avalon_sgdma_construct_stream_to_mem _desc().. alt_avalon_sgdma_construct_mem_to_stream _desc().. alt_avalon_sgdma_enable_desc_poll().. alt_avalon_sgdma_disable_desc_poll().