Intel® SoC FPGA Embedded Development Suite User Guide

1 Intel SoC FPGA EmbeddedDevelopment Suite (SoC EDS) UserGuideUpdated for Intel Quartus Prime Design Suite : FeedbackUG-1137 | document on the web: PDF | HTMLC ontents1. Introduction to the Intel SoC FPGA Embedded Development Suite (SoC EDS).. Tool Differences Between Standard and Professional Hardware and Software Development Hardware Bare Metal and RTOS Linux Kernel and Driver Linux Application Hardware Software Development Introduction to the Intel SoC FPGA EDS Revision Installing the Installation Installing SoC Installing Arm Installing Linaro Bare Metal Installing SoC Installing Arm Installing Installing Installing Linaro Bare Metal Installing the Intel SoC FPGA EDS

2 Document Revision Running the Running the Tools Revision SoC EDS Getting the Activating the Intel SoC FPGA EDS Licensing Revision 305. Arm Development Studio for Intel SoC FPGA Arm DS for Intel SoC FPGA Edition Revision Boot Tools User BSP BSP Generation BSP Generator Graphical User BSP Generator Command Line BSP Files and BSP Bootloader Image Tool (mkpimage)..40 ContentsIntel SoC FPGA Embedded Development Suite (SoC EDS) User GuideSend Header File Tool Output Image U-Boot Image Tool (mkimage).

3 Tool Usage Building the Building the Cyclone V SoC and Arria V SoC Building the Intel Arria 10 SoC Building the Intel Stratix 10 SoC and Intel Agilex Boot Tools User Guide Revision 477. Hardware Feature SoC Abstraction Layer (SoCAL).. HW Hardware Library Reference System Memory Hardware Library Revision Using the HPS Flash HPS Flash Programmer Command-Line How the HPS Flash Programmer Using the Flash Programmer from the Command HPS Flash HPS Flash Programmer Command Line Supported Memory HPS Flash Programmer User Guide Revision Bare Metal Arm Bare Metal Linaro GCC Bare Metal Compilers Revision 6110.

4 SD Card Boot Usage Tool SD Card Boot Utility Revision 6411. Linux Device Tree Linux Device Tree Generator Revision Support and Support and Feedback Revision FeedbackIntel SoC FPGA Embedded Development Suite (SoC EDS) User Guide31. Introduction to the Intel SoC FPGA EmbeddedDevelopment Suite (SoC EDS)The Intel SoC FPGA Embedded Development Suite (SoC EDS) is a comprehensivetool Suite for Embedded software Development on Intel FPGA SoC SoC EDS contains Development tools, utility programs, run-time software, andapplication examples that enable firmware and application software Development onIntel SoC hardware SoC EDS is offered in two editions.

5 SoC EDS Standard Edition The SoC EDS Standard Edition targets the Arria VSoC, Cyclone V SoC, and Intel Arria 10 SoC and must be used only with FPGA projects created in Intel Quartus Prime Standard Edition. Although the IntelFPGA SoC devices and Intel Quartus Prime Standard Edition support Intel Arria 10 SoC, Intel recommends that you use the Intel Quartus Prime Pro Edition and SoCEDS Professional Edition versions for new Intel Arria 10 SoC Projects. SoC EDS Professional Edition The SoC EDS Professional Edition targets theIntel Arria 10 SoC, Intel Stratix 10 SoC, and Intel Agilex and must be used onlywith FPGA projects created in Intel Quartus Prime Pro.

6 The SoC EDS Professional Edition does not support Cyclone V SoC and ArriaV SoC, as they are not supported by Intel Quartus Prime Pro InformationSoC EDS Licensing on page NoticeYou can find the most up-to-date information about SoC EDS on the SoC EDS andArm* Development Studio web page on InformationSoC EDS and Arm Development StudioUG-1137 | FeedbackIntel Corporation. All rights reserved. Agilex, Altera, Arria, Cyclone, Enpirion, Intel, the Intel logo, MAX, Nios,Quartus and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the and/orother countries.

7 Intel warrants performance of its FPGA and semiconductor products to current specifications inaccordance with Intel's standard warranty, but reserves the right to make changes to any products and servicesat any time without notice. Intel assumes no responsibility or liability arising out of the application or use of anyinformation, product, or service described herein except as expressly agreed to in writing by Intel. Intelcustomers are advised to obtain the latest version of device specifications before relying on any publishedinformation and before placing orders for products or services.

8 *Other names and brands may be claimed as the property of Tool VersionsTable VersionsRefer to this table when you want to determine the tool * Bare Metal Compiler (GCC) (Linaro GCC )Bare (Linaro GCC )Arm Bare Metal Compiler update 6 Arm Bare Metal Compiler Development Studio* (DS*) for Intel SoC FPGA Differences Between Standard and Professional EditionsThe main difference between the two different editions exists in the SoC devices thatare supported, as mentioned in the previous to know about installation and licensing for the two editions: The default installation paths are different between editions.

9 For details on thedefault installation paths, refer to the "Installing the Intel SoC FPGA EDS" chapter. There are no licensing differences between SoC EDS editions. None of thecomponents included with SoC EDS require a license. Only the Arm DS for IntelSoC FPGA Edition requires a InformationInstalling the Tools on page OverviewThe SoC EDS contains tools to help you perform the software Development taskstargeting the Intel FPGA SoCs, including: Board bring-up Device driver Development Operating system (OS) porting Bare Metal application Development and debugging OS- and Linux-based application Development and debugging Debug systems running symmetric multiprocessing (SMP) Debug software targeting soft IP residing on the FPGA portion of the deviceMajor components downloaded and installed with the SoC EDS package include: SoC Hardware Library (HWLIB) Hardware-to-software interface utilities.

10 Second stage bootloader generator Linux* device tree generator(1) Sample applications1. Introduction to the Intel SoC FPGA Embedded Development Suite (SoC EDS)UG-1137 | FeedbackIntel SoC FPGA Embedded Development Suite (SoC EDS) User Guide5 Golden Hardware Reference Designs (GHRD) including: FPGA hardware project FPGA hardware SRAM Object File (.sof) fileNote: The Golden Hardware Reference Designs (GHRD) included with the SoC EDSare not official releases and are intended to be used only as examples.