Intel Chipset Device Software 10.1.18793.8276 Release Notes

1 Intel Chipset Device Notes June 16th, 2021 Microsoft Windows* 10 x86(only for Intel Atom / Celeron / Pentium Processor)Microsoft Windows* 10 x64 Microsoft Windows* Server 2019 x64 Microsoft Windows* Server 2016 x64 Microsoft Windows* Server 2012R2 x64 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH Intel PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTYRIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN Intel S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, Intel ASSUMES NO LIABILITY WHATSOEVER AND INTELDISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF Intel PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY Mission Critical Application is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death.

2 SHOULD YOU PURCHASE OR USE Intel S PRODUCTS FOR ANYSUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD Intel AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OFEACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY,PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT Intel OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN,MANUFACTURE, OR WARNING OF THE Intel PRODUCT OR ANY OF ITS may make changes to specifications and product descriptions at any time, without notice.

3 Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined . Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do notfinalize a design with this products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on your local Intel sales office or your distributor to obtain the latest specifications and before placing your product names featured are used internally within Intel to identify products that are in development and not yet publicly announced for Release .

4 Customers, licensees and other third parties are not authorized by Intel to usecode names in advertising, promotionThe Intel Chipset Device Software may contain design defects or errors described as known issues which may cause the product to deviate from expected performance. Current characterized known issues aredocumented in this and the Intel logo are trademarks of Intel Corporation in the and other countries.*Other names and brands may be claimed as the property of 2021, Intel Corporation. All rights reserved. Revision HistoryDateDriver RevisionDescriptionBuild NumberJun 16, 13, 29, 16, 7, 15, 24, 18, 30, 7, 15, 4, 7, 3, Chipset Device Software SupportDriverversionMinorversionDescript ion (supported products) Gen Intel Core (Tiger Lake) (R) VT-d RegistersIntel (R) RAS RegistersIntel (R) Mesh 2 PCIe RegistersIntel (R) PMON MSM RegistersIntel (R) MSM RegistersIntel (R) NTB RegistersIntel (R) DDRIO Host Config RegistersIntel (R) CHA ALL0 RegistersIntel (R) CHA ALL1 Gen Intel Core (Rocket Lake) 500 Series Chipset Family (Tiger Lake PCH-H) 400 Series Chipset (R) LPC ControllerIntel(R) P2 SBIntel(R) PMCI ntel(R) SPI (flash)

5 ControllerIntel(R) PCI Express Root PortIntel(R) Shared 400 Series Chipset Gen Intel Core (Comet Lake) (R) LPC ControllerIntel(R) P2 SBIntel(R) PMCI ntel(R) SPI (flash) ControllerIntel(R) PCI Express Root PortIntel(R) Shared (R) LPC ControllerIntel(R) P2 SBIntel(R) PMCI ntel(R) SPI (flash) ControllerIntel(R) PCI Express Root PortIntel(R) Shared (R) On-Package Platform Controller (R) LPC ControllerIntel(R) P2 SBIntel(R) PMCI ntel(R) SPI (flash) ControllerIntel(R) PCI Express Root PortIntel(R) Shared Gen Intel Core (Tiger Lake) 495 Series Chipset Gen Intel Core (R) 300 Series Chipset (R) C240 Series Chipset 8th Gen Intel Core processor Gen Intel (R) Core (R) Celeron(R)/Pentium(R) (R) 495 Series Chipset (R) 200 series Chipset (R) 300 series Chipset (R) Xeon(R) processor E3-1200 v6 product Generation Intel (R) Core(TM) processor (R) Xeon(R) processor E3-1500 v5 product (R) Xeon(R) processor E3-1200 v5 product Generation Intel (R) Core(TM) processor (R) 100 Series (R) C230 series Chipset Generation Intel (R) Core(TM) processor Generation Intel (R) Core(TM)

6 Processor familyNew FeaturesFeatures Added in Build [ ] certified for 21H22[ ] certified for 21H23[ ] certified for 21H24[ ] certified for 21H25[ ] certified for 21H26[ ] certified for 21H27[ ] certified for 21H28[ ] certified for 21H29[ ] certified for 21H210[ ] certified for 21H211[ ] certified for 21H212[ ] certified for 21H213[ ] certified for 21H214[ ] certified for 21H215[ ] certified for 21H216[ ] certified for 21H217[ ] certified for 21H218[ ] certified for 21H219[ ] certified for 21H220[ ] certified for 21H221[ ] certified for 21H222[ ] certified for 21H223[ ] certified for 21H224[ ] certified for 21H2; Fixed DMA exemption list25[ ] certified for 21H226[ ] certified for 21H227[ ] certified for 21H2; Fixed DMA exemption listFeatures Added in Build Added in Build Added in Build [ ] made publicFeatures Added in Build [ ] made publicFeatures Added in Build [ ] Changed platform name to Server_Common.

7 Features Added in Build [ ] made publicFeatures Added in Build [ ] made publicFeatures Added in Build Added in Build [ ] certified for 20h12[ ] certified for 20h13[ ] certified for 20h14[ ] certified for 20h15[ ] certified for 20h16[ ] certified for 20h17[ ] certified for 20h18[ ] certified for 20h19[ ] certified for 20h1 Features Added in Build Added in Build [ ] made public2[ ] certified for 19h23[ ] certified for 19h24[ ] certified for 19h25[ ] added 9B54, and 9B64. Certified for 19h2 Features Added in Build [ ] added2[ ] addedFeatures Added in Build [ ] Made public, [ ] Made public, certified, updated SKUs for LPC Controller [ ]Updated SKUs for LPC Controller devices.

8 Installer updateChanges in Installer version in Installer version in Installer version in Installer version supportChanges in installer version extension infs install by installer - change logic to install many infs for single HWID with restriction: inf filesmust be from different in Installer version supported platform list from readme2 Programs and Features (ARP) entry for Chipset INF will always have English product name. Before name waslocalized during installation and looked bad when OS changed display in Installer version shows Package version and Installer versionChanges in Installer version file with error code 350 mapped to REBOOT_UPDATE_PENDINGC hanges in Installer version Fix for CVE-2019-14596 Changes in Installer version -ignoreId switch2 Updates in custom action loggingChanges in Installer version NDA readme file installed by Public package.

9 Now Public package installs correct readme in Installer version the messy code is displayed during install Chipset on Arabic OS Changes in Installer version removed from package2 Security fixes3 MUP extract and extract functions fixed4 Added Add Remove Programs entry function5 Added uninstall functionality, does not uninstall drivers only package contents (license, readme, registry keys,AddRemove programs entry)6 Installation fails with known error code on unsupported platfromChanges in Installer version packages have DriverFiles folder complying to MUP path requirements - \production\<os_name>-<os_arch> Also supports Windows10S requirement (raw driver files in package)2 Supports Windows10S requirement (raw driver files in package)3 MUP compliant4 Please note WiX framework used to build installer got updated to which contains security fixesChanges in Installer Version previous fix implementation for:Thunderbolt [TBT] power flow issue while re-applying PCIe controller inbox added devcon disable/enable functionalityBefore inf installation devcon is used to.

10 - disable root TBT devices ( Device IDs as found in table in HSD Device parent must not be a TBT Device ),- task is scheduled in Task Scheduler,- task runs on OS startup and uses devcon to enable the same root TBT Device , then the task removes itself. devcon switch, usage example devcon c:\tools\ : without an externally supplied devcon the function won t in Installer Version [TBT] power flow issue while re-applying PCIe controller inbox added devcon disable/enable functionality- Before inf installation devcon is used to disable TBT devices , then a task is scheduled in Task Scheduler; taskruns on OS startup and uses devcon to enable the same devices twice with timeout in-between, then the taskremoves devcon switch, usage example devcon c:\tools\ an externally supplied devcon the function won t work- devcontimeout switch, usage example devcontimeout 10sets how long to wait in seconds in-between enablesChanges in Installer Version exclude switch- exclude usb will not install any inf file that has USB in it s name