Kintex-7 FPGAs Data Sheet: DC and AC Switching ...

1 DS182 ( ) May 8, Specification1 2011 2017 xilinx , Inc. xilinx , the xilinx logo, Virtex, Kintex, Artix, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of xilinx in the United States and other countries. All other trademarks are the property of their respective -7 FPGAs are available in -3, -2, -1, -1L, and -2L speed grades, with -3 having the highest performance. The -2L devices are screened for lower maximum static power and can operate at lower core voltages for lower dynamic power than the -2 devices. The -2L industrial (I) temperature devices operate only at VCCINT= The -2L extended (E) temperature devices can operate at either VCCINT= or The -2LE devices when operated at VCCINT= , and the -2LI devices when operated at VCCINT= , have the same speed specifications as the -2 speed grade, except where noted.

2 When the -2LE devices are operated at VCCINT= , the speed specifications, static power, and dynamic power are reduced. The -1L military (M) temperature devices have the same speed specifications as the -1 military temperature devices and are screened for lower maximum static FPGA DC and AC characteristics are specified in commercial, extended, industrial, and military temperature ranges. Except for the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade military temperature device are the same as for a -1 speed grade commercial temperature device).

3 However, only selected speed grades and/or devices are available in each temperature supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical device and package combinations can be found in: 7 Series FPGAs Overview (DS180) Defense-Grade 7 Series FPGAs Overview (DS185)This Kintex-7 FPGA data sheet, part of an overall set of documentation on the 7 series FPGAs , is available on the xilinx website at CharacteristicsKintex-7 FPGAs Data Sheet: DC and AC Switching CharacteristicsDS182 ( ) May 8, 2017 Product SpecificationTable 1:Absolute Maximum Ratings(1)SymbolDescriptionMinMaxUnitsFP GA LogicVCCINTI nternal supply voltage supply voltage voltage for the block RAM memories drivers supply voltage for HR I/O banks drivers supply voltage for HP I/O banks supply voltage reference voltage (2)(3)(4)I/O input voltage for HR I/O banks + input voltage for HP I/O banks + input voltage (when VCCO= ) for VREF and differential I/O standards except TMDS_33(5) memory battery backup supply FeedbackKintex-7 FPGAs Data Sheet.

4 DC and AC Switching CharacteristicsDS182 ( ) May 8, Specification2 GTX TransceiverVMGTAVCCA nalog supply voltage for the GTX transmitter and receiver circuits supply voltage for the GTX transmitter and receiver termination circuits analog Quad PLL (QPLL) voltage supply for the GTX transceivers transceiver reference clock absolute input voltage supply voltage for the resistor calibration circuit of the GTX transceiver column (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage input current for receiver input pins DC coupled RX termination = floating 14mAIDCIN-MGTAVTTDC input current for receiver input pins DC coupled RX termination = VMGTAVTT 12mAIDCIN-GNDDC input current for receiver input pins DC coupled RX termination = GND output current for transmitter pins DC coupled RX termination = floating 14mAIDCOUT-MGTAVTTDC output current for transmitter pins DC coupled RX termination = VMGTAVTT 12mAXADCVCCADCXADC supply relative to GNDADC reference input relative to GNDADC temperature (ambient) 65150 CTSOLM aximum soldering temperature for Pb/Sn component bodies (6)

5 +220 CMaximum soldering temperature for Pb-free component bodies (6) +260 CTjMaximum junction temperature(6) +125 CNotes: beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device lower absolute voltage specification always I/O operation, refer to the 7 Series FPGAs SelectIO Resources User Guide (UG471). maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table Table 10 for TMDS_33 soldering guidelines and thermal considerations, see the 7 Series FPGA Packaging and Pinout Specification (UG475).

6 Table 2:Recommended Operating Conditions(1)(2)SymbolDescriptionMinTypM axUnitsFPGA LogicVCCINT(3)For -3, -2, -2LE ( ), -1, -1M, -1LM devices: internal supply -2LE ( ) devices: internal supply -2LI ( ) devices: internal supply (3)For -3, -2, -2LE ( ), -1, -1M, -1LM devices: block RAM supply -2LE ( ) devices: block RAM supply -2LI ( ) devices: block RAM supply supply (4)(5)Supply voltage for HR I/O voltage for HP I/O 1:Absolute Maximum Ratings(1) (Cont d)SymbolDescriptionMinMaxUnitsSend FeedbackKintex-7 FPGAs Data Sheet: DC and AC Switching CharacteristicsDS182 ( ) May 8, Specification3 VCCAUX_IO(6)Auxiliary supply voltage when set to supply voltage when set to (7)I/O input voltage VCCO+ input voltage (when VCCO= ) for VREF and differential I/O standards except TMDS_33(8) (9)Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode.

7 10mAVCCBATT(10)Battery TransceiverVMGTAVCC(11)Analog supply voltage for the GTX transceiver QPLL frequency range GHz(12)(13) supply voltage for the GTX transceiver QPLL frequency range > (11)Analog supply voltage for the GTX transmitter and receiver termination (11)Auxiliary analog QPLL voltage supply for the (11)Analog supply voltage for the resistor calibration circuit of the GTX transceiver supply relative to supplied reference temperature operating range for commercial (C) temperature devices0 85 CJunction temperature operating range for extended (E) temperature devices0 100 CJunction temperature operating range for industrial (I) temperature devices 40 100 CJunction temperature operating range for military (M) temperature devices 55 125 CNotes: voltages are relative to the design of the power distribution system, consult the 7 Series FPGAs PCB Design and Pin Planning Guide (UG483).

8 And VCCBRAM should be connected to the same data is retained even if VCCO drops to VCCO of , , , , (HR I/O only), and (HR I/O only) at 5%. more information, refer to the VCCAUX_IO section of 7 Series FPGAs SelectIO Resources User Guide (UG471). lower absolute voltage specification always Table 10 for TMDS_33 total of 200 mA per bank should not be VCCBATT is required only when using bitstream encryption. If battery is not used, connect VCCBATT to either ground or Each voltage listed requires the filter circuit described in the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476).12. For data rates Gb/s, VMGTAVCC should be 3% for lower power For lower power consumption, VMGTAVCC should be 3% over the entire CPLL frequency 2:Recommended Operating Conditions(1)(2) (Cont d)SymbolDescriptionMinTypMaxUnitsSend FeedbackKintex-7 FPGAs Data Sheet: DC and AC Switching CharacteristicsDS182 ( ) May 8, Specification4 Table 3.

9 DC characteristics Over Recommended Operating ConditionsSymbolDescriptionMinTyp(1)MaxU nitsVDRINTData retention VCCINT voltage (below which configuration data might be lost) VVDRIData retention VCCAUX voltage (below which configuration data might be lost) VIREFVREF leakage current per pin 15 AILI nput or output leakage current per pin (sample-tested) 15 ACIN(2)Die input capacitance at the pad 8pFIRPUPad pull-up (when selected) @ VIN=0V, VCCO= 330 APad pull-up (when selected) @ VIN=0V, VCCO= 250 APad pull-up (when selected) @ VIN=0V, VCCO= 220 APad pull-up (when selected) @ VIN=0V, VCCO= 150 APad pull-up (when selected) @ VIN=0V, VCCO= 120 AIRPDPad pull-down (when selected) @ VIN= 330 APad pull-down (when selected) @ VIN= 180 AICCADCA nalog supply current, analog circuits in powered up state 25mAIBATT(3)Battery supply current 150nARIN_TERM(4)Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_40)284055 Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_50)355065 Thevenin equivalent resistance of programmable input termination to VCCO/2 (UNTUNED_SPLIT_60)446083 nTemperature diode ideality factor rTemperature diode series resistance 2 Notes.

10 Values are specified at nominal voltage, 25 measurement represents the die capacitance at the pad, not including the value specified for worst case process at 25 resistance to a VCCO/2 4:VIN Maximum Allowed AC Voltage Overshoot and Undershoot for HR I/O Banks(1)(2)AC Voltage Overshoot% of UI at 55 C to 125 CAC Voltage Undershoot% of UI at 55 C to 125 CVCCO+ + + + + + + + FeedbackKintex-7 FPGAs Data Sheet: DC and AC Switching CharacteristicsDS182 ( ) May 8, Specification5 VCCO+ : total of 200 mA per bank should not be peak voltage of the overshoot or undershoot, and the duration above VCCO+ or below GND , must not exceed the values in this 5:VIN Maximum Allowed AC Voltage Overshoot and Undershoot for HP I/O Banks(1)(2)AC Voltage Overshoot% of UI at 55 C to 125 CAC Voltage Undershoot% of UI at 55 C to 125 CVCCO+ + (3) (3)VCCO+ (3) (3)VCCO+ (3)VCCO+ (3)VCCO+ (3)VCCO+ + + : total of 200 mA per bank should not be peak voltage of the overshoot or undershoot, and the duration above VCCO+ or below GND , must not exceed the values in this UI la