Lecture 19 - MIT

1 Spring 2007 Lecture 191 Lecture 19 Transistor Amplifiers (I)Common-Source AmplifierOutline Amplifier fundamentals Common-source amplifier Common-source amplifier with current-source supplyReading Assignment:Howe and Sodini; Chapter 8, Sections :Quiz #2:April 25, 7:30-9:30 PM at Walker. Calculator Required. Open book. Spring 2007 Lecture 192 Amplifier Fundamentals Source resistance RSis associated onlywith small signal sources Choose ID= ISUP---> DC output current IOUT= 0 VOUT= 0+ + vsisRSvIN = VBIAS + vs iIN = IBIAS + is VBIASIBIASRSV oltage InputCurrent InputSupplyCurrent ISUPI nputsourcesIntrinsicAmplifierActive DeviceiD = f(input) ISUPRLiOUT = idiD+ V V+ Spring 2007 Lecture 1932.

2 Common-Source Amplifier: VBIAS, RDand W/L of MOSFET selected to bias transistor in saturation and obtain desired output bias point ( VOUT= 0).Consider the following circuit: Consider intrinsic voltage amplifier - no loading RS= 0 RL---> VGS= VBIAS-VSSW atch notation: vOUT(t)=VOUT+vout(t)vsVBIASvOUTV+=VDDV-= VSSiRiDRDRSRL signal source+ Spring 2007 Lecture 194 Bias point calculation; Limits to signal swing Small-signal gain; Frequency response [in a few days] Want:Transfer characteristics of amplifier:Load line view of amplifier:VOUTVGG-VSS0 VDD-VSSVTVDDVSSVOUTVGG-VSS=VDD-VSSVGG-VS SVGG-VSS=VT0IR=IDVSSVDDVDD-VSSRD load lineVBIAS-Vss= VDD-VSSVBIAS-VssVBIAS-Vss= Spring 2007 Lecture 195 Bias point: choice of VBIAS, W/L, and RDto keep transistor in saturation and to get proper quiescent we select VOUT=0:Assume MOSFET is in saturation:Then:Equation that allows us to compute needed VBIAS given RDand nCoxVBIAS VSS VT()2IR=VDD VOUTRDID=IR=W2L nCoxVBIAS VSS VT()2=VDDRDVBIAS=2 IDWL nCox+VSS+ Spring 2007 Lecture 196 Signal swing: Upswing.

3 Limited by MOSFET going into ,max=VDD Downswing: limited by MOSFET leaving ,sat=VGS VT=2 IDWL nCoxorThen:vout,min VSS=VBIAS VSS VTvout,min=VBIAS VTvsVBIASvOUTVDDVSSRDRS signal source+ Spring 2007 Lecture 197 Generic view of the effect of loading on small-signal operationTwo-port network view of small-signal equivalent circuit model of a voltage amplifier:Rinis input resistanceRoutis output resistanceAvois unloaded voltage gainVoltage divider at input:Voltage divider at output:Loaded voltage gain:vin=RinvsRin+Rsvout=RLAvovinRout+RL voutvs=RinRin+RSAvoRLRL+Rout+-vin+-voutA vovinRout+-RinRsvs+-RLunloaded Spring 2007 Lecture 198 Small-signal voltage gain Avo: draw small-signal equivalent circuit model: Remove RLand RSThen unloaded voltage gain:Avo=voutvt= gmro//RD()vout= gmvtro//RD()GSD+-vt+-vgs+-voutgmvgsroRD+ -vt+-voutgmvt(ro//RD) Spring 2007 Lecture 199 Input Resistance Calculation of input resistance, Rin: Load amplifier with RL Apply test voltage (or current) at input, measure test current (or voltage).

4 For common-source amplifier:No effect of loading at Rin=vtit= ++--vgsvtitgmvgs(ro//RD) Spring 2007 Lecture 1910 Output Resistance Calculation of output resistance, Rout: Load amplifier with RS Apply test voltage (or current) at output, measure test current (or voltage). Set input source equal zeroFor common-source amplifier:vgs=0 gmvgs=0 vt=itro//RD()Rout=vtit=ro//RD++--vgsvtit gmvgs(ro//RD) Spring 2007 Lecture 1911 Two-port network view of common-source amplifierVoltage Amplifier voutvs=RinRin+RSAvoRLRL+Routvoutvs= gmro//RD()RLRL+ro//RD= gmro//RD//RL()+-vin+-voutAvovinRout+-Rin Rsvs+-RLIntrinsic Spring 2007 Lecture 1912 Current Source Supply iSUP= 0 for vSUP 0 iSUP= ISUP+ vSUP/ roc for vSUP> 0 High small-signal resistance circuit models :I V characteristics of current source.

5 ISUPISUPvSUP1rocvSUPiSUP+_ISUP rociSUPvSUP+_roclarge-signal modelsmall-signal Spring 2007 Lecture 19133. Common-source amplifier with current-source supplyvsVBIASvOUTVDDVSSiSUPiDRSRL signal source+-signalloadLoadline ViewVOUTVBIAS-VSS=VDD-VSSVBIAS-VSSVBIAS- VSS=VT0iSUP=IDVDD load Spring 2007 Lecture 1914 ISUP=IDn=W2L n nCoxVBIAS VSS VTn()2 VBvsVBIASvOUTVDDVSSiDiSUPRS signal sourceUse PMOS for current source supplyISUP= IDp=W2L p pCoxVDD VB+VTp()2 VBIAS=2 ISUPWL n nCox+VSS+VTBias point: Assume both transistors in saturationVOUT= 0. Choose ISUPand determine -IDp= IDnfor VOUT~ Spring 2007 Lecture 1915 Signal swing: Upswing: limited by PMOS leaving saturation.

6 Downswing: limited by NMOS leaving saturation. Same result as with resistive supply ,sat=VSG+VTp=VDD VB+VTpVDD vout,max=VDD VB+VTpvout,max=VB VTpvout,min=VBIAS VTVBvsVBIASvOUTVDDVSSiDiSUPRS signal Spring 2007 Lecture 19163. Common-source amplifier with current-source supply (contd.)Current source characterized by high output resistance:roc. Significantly higher than amplifier with resistive MOSFET: roc= 1/ IDp Voltage gain: Avo= -gm(ro//roc). Input resistance :Rin= Output resistance: Rout= Spring 2007 Lecture 1917 Relationship between circuit figures of merit and device parametersCS amplifier with current source supply is a good voltage amplifier (Rinhigh and |Avo| high), but Routhigh too voltage gain degraded if RL<< :gm=2 IDWL nCoxro 1 nID LIDThen:Circuit Parameters|Avo|RinRoutDevice*Parametersg m(ro//roc) ro//rocISUP - W --L - * adjustments are made to VBIAS so that none ofthe other Spring 2007 Lecture 1918 What did we learn today?

7 Summary of Key Conceptsfor CS amplifier Bias Calculations Signal Swing Small Signal Circuit Parameters Voltage Gain - AVO Input Resistance - Rin Output Resistance - Rout Relationship between small signal circuit and device parameters