Lecture 4: CMOS Transistor Theory - Pitt

1 Introduction to cmos VLSI Design Lecture 4: cmos Transistor Theory David Harris, Harvey Mudd College Kartik Mohanram and Steven Levitan University of Pittsburgh cmos VLSI Design 3: cmos Transistor Theory Slide 2 Outline q Introduction q MOS Capacitor q nMOS I-V Characteristics q pMOS I-V Characteristics q Gate and Diffusion Capacitance q Pass Transistors q RC Delay Models cmos VLSI Design 3: cmos Transistor Theory Slide 3 Introduction q So far, we have treated transistors as ideal switches q An ON Transistor passes a finite amount of current Depends on terminal voltages Derive current-voltage (I-V) relationships q Transistor gate, source, drain all have capacitance I = C ( V/ t) -> t = (C/I) V Capacitance and current determine speed q Also explore what a degraded level really means Digital Integrated Circuits2nd Devices MOS Transistors - Types and Symbols D S G D S G G S D D S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact Digital Integrated Circuits2nd Devices The MOS Transistor Polysilicon Aluminum Digital Integrated Circuits2nd Devices Controlling current flow in an nFET.

2 Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright 2004 John Wiley & Sons. All rights reserved. Digital Integrated Circuits2nd Devices Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright 2004 John Wiley & Sons. All rights reserved. Controlling current flow in a pFET. Digital Integrated Circuits2nd Devices What is a Transistor ? VGS VTRonSDA Switch! |V GS | A MOS Transistor I-V Curves Resistor I = V/R Diode I = Is*exp(k*V-Vt) Current (I) vs. Voltage (V) I = f(V) 0 1 2 0 1 2 3 4 5 6 x 10 -4 V DS I D (A) MOS I = f(Vgs, Vds) cmos VLSI Design 3: cmos Transistor Theory Slide 10 Terminal Voltages q Mode of operation depends on Vg, Vd, Vs Vgs = Vg Vs Vgd = Vg Vd Vds = Vd Vs = Vgs - Vgd q Source and drain are symmetric diffusion terminals By convention, source is terminal at lower voltage Hence Vds 0 q nMOS body is grounded.

3 First assume source is 0 too. q Three regions of operation Cutoff Linear Saturation VgVsVdVgdVgsVds+-+-+- cmos VLSI Design 3: cmos Transistor Theory Slide 11 MOS Capacitor q Gate and body form MOS capacitor q Operating modes Accumulation Depletion Inversion polysilicon gate(a)silicon dioxide insulatorp-type body+-Vg < 0(b)+-0 < Vg < Vtdepletion region(c)+-Vg > Vtdepletion regioninversion regionIn general, MOS gate capacitance is not constant Digital Integrated Circuits2nd Devices Copyright 2005 Pearson Addison-Wesley. All rights reserved. MOS Transistors Operating regions cmos VLSI Design 3: cmos Transistor Theory Slide 13 nMOS Cutoff q No channel q Ids = 0 +-Vgs = 0n+n++-Vgdp-type bodybgsdd s g cmos VLSI Design 3: cmos Transistor Theory Slide 14 nMOS Linear q Channel forms q Current flows from d to s e- from s to d q Ids increases with Vds q Similar to linear resistor +-Vgs > Vtn+n++-Vgd = Vgs+-Vgs > Vtn+n++-Vgs > Vgd > VtVds = 00 < Vds < Vgs-Vtp-type bodyp-type bodybgsdbgsdIdsd s g Digital Integrated Circuits2nd Devices n+n+p-substrateDSGBVGSxLV(x)+ VDSIDMOS Transistor and its bias conditionsLinear Region Vgs>Vt & Vgd>Vt Positive Charge on Gate.

4 Channel exists, Current Flows since Vds > 0 Ids = k (W/L)((Vgs-Vt)Vds-Vds2/2) R Vgd Vgs Ids Vds I=V/R R= 1/(k (W/L)(Vgs-Vt)) Ids cmos VLSI Design 3: cmos Transistor Theory Slide 16 nMOS Saturation q Channel pinches off q Ids independent of Vds q We say current saturates q Similar to current source +-Vgs > Vtn+n++-Vgd < VtVds > Vgs-Vtp-type bodybgsdIdsd s g Digital Integrated Circuits2nd Devices n+n+SGVGSDVDS > VGS - VTVGS - VT+-Saturation: Vgs>Vt & Vgd<Vt Positive Charge on Gate: Channel exists, Current Flows since Vds > 0 But: channel is pinched off Ids = (k /2)(W/L)(Vgs-Vt)2 Vgd Vgs Ids Ids cmos VLSI Design 3: cmos Transistor Theory Slide 18 I-V Characteristics q In Linear region, Ids depends on How much charge is in the channel?

5 How fast is the charge moving? Digital Integrated Circuits2nd Devices Copyright 2005 Pearson Addison-Wesley. All rights reserved. MOS Transistors Regions Transitions cmos VLSI Design 3: cmos Transistor Theory Slide 20 Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion Gate oxide channel q Qchannel = n+n+p-type body+Vgdgate++source-Vgs-drainVdschannel -VgVsVdCgn+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = )polysilicongateCMOS VLSI Design 3: cmos Transistor Theory Slide 21 Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion Gate oxide channel q Qchannel = CV q C = n+n+p-type body+Vgdgate++source-Vgs-drainVdschannel -VgVsVdCgn+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = )polysilicongateCMOS VLSI Design 3.

6 cmos Transistor Theory Slide 22 Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion Gate oxide channel q Qchannel = CV q C = Cg = oxWL/tox = CoxWL q V = n+n+p-type body+Vgdgate++source-Vgs-drainVdschannel -VgVsVdCgn+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = )polysilicongateCox = ox / tox Cox = *fF/um2 cmos VLSI Design 3: cmos Transistor Theory Slide 23 Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion Gate oxide channel q Qchannel = CV q C = Cg = oxWL/tox = CoxWL q V = Vgc Vt = (Vgs Vds/2) Vt n+n+p-type body+Vgdgate++source-Vgs-drainVdschannel -VgVsVdCgn+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = )polysilicongateCox = ox / tox cmos VLSI Design 3: cmos Transistor Theory Slide 24 Carrier velocity q Charge is carried by e- q Carrier velocity v proportional to lateral E-field between source and drain q v = cmos VLSI Design 3.

7 cmos Transistor Theory Slide 25 Carrier velocity q Charge is carried by e- q Carrier velocity v proportional to lateral E-field between source and drain q v = E called mobility q E = cmos VLSI Design 3: cmos Transistor Theory Slide 26 Carrier velocity q Charge is carried by e- q Carrier velocity v proportional to lateral E-field between source and drain q v = E called mobility q E = Vds/L q Time for carrier to cross channel: t = cmos VLSI Design 3: cmos Transistor Theory Slide 27 Carrier velocity q Charge is carried by e- q Carrier velocity v proportional to lateral E-field between source and drain q v = E called mobility q E = Vds/L q Time for carrier to cross channel: t = L / v cmos VLSI Design 3: cmos Transistor Theory Slide 28 nMOS Linear I-V q Now we know How much charge Qchannel is in the channel How much time t each carrier takes to cross dsI= cmos VLSI Design 3: cmos Transistor Theory Slide 29 nMOS Linear I-V q Now we know How much charge Qchannel is in the channel How much time t each carrier takes to cross channeldsQIt== cmos VLSI Design 3: cmos Transistor Theory Slide 30 nMOS Linear I-V q Now we know How much charge Qchannel is in the channel How much time t each carrier takes to cross channelox22dsdsgstdsdsgstdsQItWVCVV VLVVVV = = = ox = WCL Digital Integrated Circuits2nd Devices Computed Curves Vgs = 5v Vgs = Vgs = Linear Resistor cmos VLSI Design 3.

8 cmos Transistor Theory Slide 32 nMOS Saturation I-V q If Vgd < Vt, channel pinches off near drain When Vds > Vdsat = Vgs Vt q Now drain voltage no longer increases current dsI= cmos VLSI Design 3: cmos Transistor Theory Slide 33 nMOS Saturation I-V q If Vgd < Vt, channel pinches off near drain When Vds > Vdsat = Vgs Vt q Now drain voltage no longer increases current 2dsatdsgstdsatVIVV V = cmos VLSI Design 3: cmos Transistor Theory Slide 34 nMOS Saturation I-V q If Vgd < Vt, channel pinches off near drain When Vds > Vdsat = Vgs Vt q Now drain voltage no longer increases current ()222dsatdsgstdsatgstVIVV VVV = = cmos VLSI Design 3: cmos Transistor Theory Slide 35 Computed Curves Vgs = 5v Vgs = Vgs = Linear Resistor cmos VLSI Design 3: cmos Transistor Theory Slide 36 nMOS I-V Summary ()2cutofflinearsaturatio022ngstdsdsgstds dsdsatgstdsdsatVVVIVV VVVVVVV < = < > q Shockley 1st order Transistor models cmos VLSI Design 3: cmos Transistor Theory Slide 37 Example q We will be using a m process for your project From TSMC Semiconductor tox = 40 = 180 cm2/V*s Vt = V q Plot Ids vs.

9 Vds Vgs = 0, ,.., Use W/L = 4/2 () 10350120/100 10oxWWWCAVLLL === 180 40 155 cmos VLSI Design 3: cmos Transistor Theory Slide 38 pMOS I-V q All dopings and voltages are inverted for pMOS q Mobility p is determined by holes Typically 2-3x lower than that of electrons n q Thus pMOS must be wider to provide same current Often, assume n / p = 2 Digital Integrated Circuits2nd Devices Current-Voltage Relations Long-Channel Device Cut-off (VGS VT < 0) no current (not really) Digital Integrated Circuits2nd Devices ID versus VDS short channel device -4 V DS (V) 0 1 2 0 1 2 x 10 I D (A) VGS= V VGS= V VGS= V VGS= V 0 1 2 0 1 2 3 4 5 6 x 10 -4 V DS (V) I D (A) VGS= V VGS= V VGS= V VGS= V Resistive Saturation VDS = VGS - VT Long Channel Short Channel Digital Integrated Circuits2nd Devices Rabaey s unified model for manual analysis S D G B Digital Integrated Circuits2nd Devices Transistor Model for Manual Analysis Digital Integrated Circuits2nd Devices Simple Model versus SPICE 0 1 2 0 1 2 x 10 -4 V DS (V) I D (A) Velocity Saturated Linear Saturated VDSAT=VGT VDS=VDSAT VDS=VGT Digital Integrated Circuits2nd Devices Even Simpler.

10 The Transistor as a Switch VGS VTRonSDIDVDSVGS = VDDVDD/2 VDDR0 Rmid Digital Integrated Circuits2nd Devices The Transistor as a Switch This week s Lab find Req for our TSMC 180nm process Digital Integrated Circuits2nd Devices Saturation Effects Which is the resistor? Discharge of 1pf capacitor, with Vgs of 3,4,5 volts. Also, 12k resistor. d s g cmos VLSI Design 3: cmos Transistor Theory Slide 47 More on Capacitance q Any two conductors separated by an insulator have capacitance q Gate to channel capacitor is very important Creates channel charge necessary for operation q Source and drain have capacitance to body Across reverse-biased diodes Called diffusion capacitance because it is associated with source/drain diffusion cmos VLSI Design 3.