Solutions for Powering Intel and AMD SoCs

1 Presenter: Mario Willeit April 22, 2020 Solutions forPoweringIntel and AMD SoCsSenior Field ApplicationsEngineerSouth East Germany / Intro: Mario WilleitSolutions forPoweringIntel andAMD SoCs Solution Overview Digital Multi-Phase Controller Powerstage / DrMOS/ IntelliPhase Design Tools TGL-UP3 Example Summary Q&AAgendaMPS Solution OverviewINTEL (EHL, TGL, ..)AMD (Ryzen, ..)Single / MultiphaseDigital-ControllerMP28/29xxInt elliphaseMP86xxxN-phasesSDRAMDDR3/4, LPDDR3/4/4X/5 SVID (IMVP8/9 , VR13/14)SVI2/3, GUI SoftwareCurrentsenseTEMP/FaultPMBUSD ifferential VoltageSenseAll ceramicsormixedceramic/POSCAPS ingle/multirail,Single/multiphaseBuck / LDOsNB68xAll SDRAM voltages+power up/down sequencingPOL regulatorswithpinselectablevoltagesandSo Cdedicatedtimingaswellasuniversal regulatorsBuckNB6xxBuckNB6xxDigital Multi-Phase ControllerFEATURES Single/Multiple Loop (Flexible Phase Assignment) Patented Constant on-time Control.

2 Best Transient in the Market All Digital Control via PMBUS Minimal External Components Telemetry Vin, Vo, Iin, Iout, Pin, Pout, Temperature Peak Current Detection Advanced Fault Handling OCP, OVP, UVP, OTP Cycle-by-cycle OC/UC Catastrophic Failure ProtectionPowerstage / DrMOS/ IntelliPhaseFEATURES Continuous Current up to 80A, Peak Current up to 125A (MP86998) Package Options: Common Footprint (CFP) MPS Proprietary Footprint Supports Wide FswRange From 100kHz to 3 MHz Balanced Between Transient and Efficiency Built-In ZCD, OCP, NOCP, OTP, SCP Current Sense Tolerance 3% Single-End Current Sensing Output Minimal External Components Immune to NoisePowerstage / DrMOS/ IntelliPhaseFlip-Chip PackageOn-Die Current Sensing CS pin is a current output of 10 A x Iout Tracks current cycle by cycle Independent of the Temperature, Rdson, and Inductor DC resistance variations ( 3%)

3 No thermal compensation needed High Reliability Small Form Factor Good Thermal Design Low Parasitic Inductance Monolithic Design Distributed Gate Driver (DGD) minimizes the Gate Delay, significantly reduces the dead time Minimized path from driver to FET cells, strong driving capability with fast turn-on/off speedDesign Tools : Reference Designs / Layout Guidelines andEVBsInput Capacitor: 0805 package (top side & bottom side)Inductor: (mm)VCC/BST capacitor: 0402 packageVia size: 20/10 mils Reference schematic for most SoCsfrom Intel /AMD(either from MPS or SoCvendor) Proven and detailed layout guidelines in each DrMOS/POL regulator datasheet Evaluation Boards for many digital controller/DrMOSand POL regulatorDesign Tools.

4 Digital Controller Configuration MPS provides design/SoCspecific initial configuration for digital controller Based on experience, validated with SoCvendor tools on MPS evaluation boards ( Intel VRTT) Customer can further optimize the design with MPS Excel Design tool and GUI softwareExcel Design File Design Target Specification Detailed Configuration(Design Tuning)Configuration FileGUI Software (Windows)Programming AdapterDigital Controller Example: MP2940A ( Intel IMVP8/9)Digital Controller Example: MP2945 (AMD SVI2)MP29455-phase/2rail Controller5x5 PKG MP28456-phase/4-railSVI3 Next Gen AMD AMD Has Chosen MPS As SVI3 Development Partner!

5 DrMOSE xamplesMP86902 BMP86901 CMP86901 BMP86902 AMP86901A50A25A12A22V12V 3X43X43X43X33X31151617181921201110987562 34141312 BSTVCCAGNDCSVTEMP/FAULTSYNCPWMVINSWSWSWV INPGNDPGNDPGNDPGNDPGNDPGNDPGNDPGNDPGNDMP 86941/71 (w/PFO) 3X54X6MP869495X6 MPQ86940MP86979 5X6 CF Version of MP86949 / / 45A3-22V / / / / 12A3-12V / 15A3-12V / / 50A16V Intel TGL-UP3 Design Example(VCCIN, VCCIN_AUX) Intel TGL-UP3 Example(VCCIN, VCCIN_AUX)3x47uF BulkCapacitanceat theinput15x22uF + 1x330uF10x22uF + 1x220uFIntel TGL-UP3 Example(Other Rails) CompletePower Solution froma singlevendor Digital Controller easesdesign processandverfication Fast Control Loop allowsreductionofoutputcapacitorstofullf illripple/transient specifications High efficiency Monolithic DrMOSdevices with low thermal resistance Flip-Chip packagessupports space constraints designs Accurate DrMOSon-die current sense leads to better overall system performance and much less engineering effort (no inductor DCR sensing and temperature compensation required) Design Support(initial controller configuration, layout guides, schematic/layout review)Reducesriskand savesdevelopmenttimeSummary Q&A