Synthesis of Optimal On-Chip Baluns - Integrand Software

1 Synthesis of Optimal On-Chip BalunsSharad Kapur, David E. Long and Robert C. FryeIntegrand Software , Heights, New JerseyYu-Chia Chen, Ming-Hsiang Cho, Huai-Wen Chang, Jun-Hong Ou and Bigchoug HungUMCHsin-Chu City, TaiwanCICC 2007, San Jose2 OutlinezIntroductionzMotivation for using On-Chip balunszSynthesis of Optimal Baluns EM simulation Scalable model generation Model tuning and Optimal synthesiszMeasurement and verificationzConclusions3 balun introductionzBaluns and transformers are important components found in mobile phones and other wireless balunis a passive component that transforms power from a BALancedto an UNbalanced most cases, Baluns also perform impedance of a transformer and tuning capacitorsRse=50 OhmsRdiff=200 Ohms4 Baluns figures of merit.

2 Differential to single-ended insertion loss. Differential (balanced) input impedance (return loss). Single-ended (unbalanced) input impedance (return loss). Imbalance is often measured as maximum amplitude and phase Baluns ( 50 -50 , 50 -200 etc.) used conjugate matched ports with real Baluns may have complex port RF Front-End ConfigurationRFIC PALNADIFFMATCHDIFFMATCHBALUNBALUNANTT/RS WITCHzRFIC circuit architecture is typically differentialzAntennas and board level RF configurations are single-endedzOne or two Baluns are required in the front end zConventional front-end configuration uses an external balun to convert to single-ended transmission networks required between the balun and RFIC6 Integrated balun /MatchRFIC PALNADIFFMATCHDIFFMATCHBALUNBALUNANTT/RS WITCHzIntegrated Baluns are

3 Custom-designed to match both unbalanced and balanced impedance merge the functionality of the balun and matching network into a single also make it possible to integrate the T/R switch in some On-Chip ?zBalun loss directly impacts noise figure and power efficiencyzTraditionally Baluns have been off- chip ceramic componentszWith thick metal copper, high resistivity substrates and good design techniques we can now fabricate better On-Chip Baluns than off- chip Baluns while requiring significantly less areaLow process variation and high yield, better integrationLarge process variation and low yieldYieldSmall (300 m x 300 m)Large (2mm x )Area< Imbalance< degrees10 degreesPhase LossOn- chip Baluns (UMC)Ceramic Baluns (Murata, TDK)

4 8 Optimal balun an automated layout EM simulations over the design a scalable an optimizer to determine the Optimal layout and tuning capacitor valueszSteps I, II and III are one time, pre-characterization steps that are technology dependent9 Layout generationzParameterized layout generator for transformerszThe design space turns ratio (1:1 1:4) number of turns (2-5) width (4 m-10 m) outer diameter (50 m-400 m)zCreate about 1000 transformer layoutszA sample 1:2 transformer layout. The layout also shows the tuning MIM capacitors used10 EMX 3D electromagnetic solverzPhysical Effects on ICs R, L.

5 C and Substrate effects unified and fully coupled zInductancezDistributed 3D volume currentszResistance Skin effect and volume losszCapacitance Accurate sidewalls of MOM caps Thin-film MIM capszSubstrate Multi-layered lossysubstrate Substrate doping and bias3D Mesh of Baluncurrent flow11 EMX uses an FMM-based fast matrix solverzIntegral Equation-based 3D EM Field Solver Preconditioned iterative methods New Full-Wave FMM Layout-regularity exploited Adaptive Fast Frequency Sweep using Krylov subspace techniques See Large-scale full-wave simulation , DAC 2004, Kapur and 2 orders of magnitude faster than finite-element tools 1 order faster than BEMz1000 balun simulations run overnight330MB307s26,662200DC-10 GHz160MB90s26, functionsFreqsFreq.

6 RangeIntel GHz, 16 GB RAM12 Building a scalable transformer modelzThe topology for the scalable model was derived from intuition Two center-tapped coils Each coil has additional resistors and inductors for modeling skin effect Combination of resistors and capacitors model the substrate Each element has a value that is a non-linear function of the geometric parameters The specific form is based on physical intuition ( , main series resistance is proportional to diameter and inversely proportional to width)13 Using Continuum for Model synthesiszThe program Continuum was used to build the scalable transformer from the 1000 S-parameter files zContinuum uses a specialized non-linear, least squares optimizer Special circuit based constraints are used to ensure passivity (R, L, C > 0 and the matrix corresponding to k values needs to be positive definite)

7 An objective function that included S-parameters from the simulation as well as derived metrics such as insertion losszError histogram shows < 2% error model vssimulationModel playback vs simulation14 Optimal balun synthesistuning capszA separate program called the Optimal Transformer Finder (OTF) was developedzGiven a scalable model of a transformer and load impedance characteristics obtains Optimal tuning capacitors to insertion losszThis program takes a few seconds to find the Optimal balun (transformer)zCan be used to trade-off insertion loss vs silicon areazThe Baluns are Optimal for a given layout style and design spacescalable transformer model15 Designing a balun for Optimal insertion losszThe designer specifies the input and output impedances.

8 Input impedance of package Output impedance of driverzThe OTF then finds the optimum transformer associated tuning capacitors that satisfy the loss constraintszThe most importantdesign is a balun which has a single-ended input and a differential output Primary is not center-tapped Secondary is center-tapped16 Designing an balunzDesign a single-ended to differential balun with center-tapped output using the following constraints 50 Ohms input impedance 200 Ohms output impedance Minimum insertion loss of 1dB Maximum return loss of 10dBzOTF determines balun geometry Input and Output MiMcapacitor values to tune the balun Minimize area (including MiMarea)17 Plotting insertion and return lossesInsertion lossReturn loss18 Measurement and verificationzThe technique described was used to design 4 commonly used 2.

9 1 Baluns with single-ended input impedance 50 and differential output impedance of 200 (5115-5825 MHz) (2400-2483 MHz) DCS (1710-1880 MHz) GSM (824-915 MHz)zThe devices were fabricated by UMC on a standard 90nm, 9 level Copper metal process with 3 m thick metal for the top metal and substrate resistivity of 20 Ohm-cmzTuning MiM capacitors of about 2fF/square micron used19 TransformerMeasurement setupzFor verification two separate sets of layouts 4 transformers 4 balunszFour-port measurements were obtained using an AgilentPLTS 50 GHz characterization network the purposes of verification, all devices were considered to contain the leads up to the edge of the pad frame.

10 This allowed us to use only an open de-embedding and still have minimal de-embedding plots EMX vs Measurement21 Transformer plots EMX vs Measurement22 balun silicon verification (Insertion Loss)23 Phase and Amplitude imbalance24 balun summaryzThe 4 characterized Baluns have excellent characteristics! Insertion loss of less than Return loss of about 16dB Phase imbalance of less than degrees Amplitude imbalance of less than to off- chip Baluns [1] A design of the Ceramic chip balun using Multilayer Configuration, et al., IEEE MTT, Vol 49, 2001[2] Design of New-Three Line balun and its implementation using Multilayer Configuration, Lee, et al.