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Universal Serial Bus Specification

Universal Serial BusSpecificationCompaqIntelMicrosoftNECR evision 23, 1998 Universal Serial Bus Specification Revision of this RevisionThe revision of the Specification is intended for product design. Every attempt has been made to ensure aconsistent and implementable Specification . Implementations should ensure compliance with this HistoryRevisionIssue 11, 1994 Supersedes 30, 1994 Revisions to Chapters 3-8, 10, and 11. 13, 1995 Revisions to all the 25, 1995 Revisions to all the FDRN ovember 13, 1995 Revisions to Chapters 1, 2, 15, 1996 Edits to Chapters 5, 6, 7, 8, 9, 10, and 11 23, 1998 Updates to all chapters to fix problems Serial Bus SpecificationCopyright 1998, Compaq Computer Corporation,Intel Corporation, Microsoft Corporation, NEC rights PROPERTY DISCLAIMERTHIS Specification IS PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER INCLUDINGANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANYWARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, Specification , OR LICENSE IS HEREBY GRANTED TO REPRODUCE AND DISTRIBUTE THIS Specification FORINTERNAL USE ONLY.

Universal Serial Bus Specification Compaq Intel Microsoft NEC Revision 1.1 September 23, 1998. Universal Serial Bus Specification Revision 1.1 ii Scope of this Revision The 1.1 revision of the specification is intended for product design. Every attempt has been made to ensure a

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Transcription of Universal Serial Bus Specification

1 Universal Serial BusSpecificationCompaqIntelMicrosoftNECR evision 23, 1998 Universal Serial Bus Specification Revision of this RevisionThe revision of the Specification is intended for product design. Every attempt has been made to ensure aconsistent and implementable Specification . Implementations should ensure compliance with this HistoryRevisionIssue 11, 1994 Supersedes 30, 1994 Revisions to Chapters 3-8, 10, and 11. 13, 1995 Revisions to all the 25, 1995 Revisions to all the FDRN ovember 13, 1995 Revisions to Chapters 1, 2, 15, 1996 Edits to Chapters 5, 6, 7, 8, 9, 10, and 11 23, 1998 Updates to all chapters to fix problems Serial Bus SpecificationCopyright 1998, Compaq Computer Corporation,Intel Corporation, Microsoft Corporation, NEC rights PROPERTY DISCLAIMERTHIS Specification IS PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER INCLUDINGANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANYWARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, Specification , OR LICENSE IS HEREBY GRANTED TO REPRODUCE AND DISTRIBUTE THIS Specification FORINTERNAL USE ONLY.

2 NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OROTHERWISE, TO ANY OTHER INTELLECTUAL PROPERTY RIGHTS IS GRANTED OR OF THIS Specification DISCLAIM ALL LIABILITY, INCLUDING LIABILITY FORINFRINGEMENT OF PROPRIETARY RIGHTS, RELATING TO IMPLEMENTATION OFINFORMATION IN THIS Specification . AUTHORS OF THIS Specification ALSO DO NOTWARRANT OR REPRESENT THAT SUCH IMPLEMENTATION(S) WILL NOT INFRINGE and Apple Desktop Bus are trademarks of Apple Computer, and Windows NT are trademarks and Microsoft and Win32 are registered trademarks of Microsoft , PS/2, and Micro Channel are registered trademarks of International Business Machines is a registered trademark of American Telephone and Telegraph is a registered trademark of Compaq Computer is a registered trademark of UNIX System is a trademark of Phillips is a trademark of Digital Equipment other product names are trademarks, registered trademarks, or servicemarks of their respective send comments via electronic mail to industry information, refer to the USB Implementers Forum web page at Serial Bus Specification Revision 1 INTRODUCTION.

3 Of the Specification .. of the Document .. Organization ..2 CHAPTER 2 TERMS AND ABBREVIATIONS .. 3 CHAPTER 3 for the Universal Serial Bus .. of Application List ..12 CHAPTER 4 ARCHITECTURAL OVERVIEW .. System Description .. Topology .. Interface .. Distribution .. Management .. Protocol .. Detection .. of USB Devices .. of USB Enumeration .. Flow Types .. Serial Bus Specification Revision Transfers .. Transfers .. USB Devices .. Descriptions .. Host: Hardware and Architectural Extensions ..24 CHAPTER 5 USB DATA FLOW Topology .. Host .. Devices .. Bus Bus Software-to-function Communication Flow .. Endpoints .. Transfers .. Transfer Data Format .. Transfer Direction .. Transfer Packet Size Transfer Bus Access Transfer Data Transfers .. Transfer Data Transfer Transfer Packet Size Constraints .. Transfer Bus Access Constraints .. Transfer Data Transfers.

4 Transfer Data Format .. Transfer Direction .. Transfer Packet Size Transfer Bus Access Transfer Data Sequences .. Transfers .. Transfer Data Format .. Transfer Direction .. Transfer Packet Size Constraints ..47 Universal Serial Bus Specification Revision Transfer Bus Access Constraints .. Transfer Data Sequences .. Access for Bus Transaction Buffer Sizes in Functions and Software .. Bandwidth Reclamation .. Special Considerations for Isochronous Transfers .. Example Non-USB Isochronous USB Clock Model .. Clock Synchronization .. Isochronous Data Prebuffering .. SOF Tracking .. Error Buffering for Rate Matching ..71 CHAPTER 6 Connector .. Cable Assemblies .. Captive Cable Assemblies .. Captive Cable Assemblies .. Cable Mechanical Configuration and Material Requirements .. Icon Location .. Connector Termination Data .. A and Series B Receptacles.

5 A and Series B Plugs .. Mechanical Configuration and Material Requirements .. Characteristics .. Environmental Characteristics .. , Mechanical and Environmental Compliance Standards .. Documents .. Grounding .. Reference Serial Bus Specification Revision 7 .. Driver Characteristics .. Signal Rise and Fall .. Characteristics .. Speed Identification .. Encoding/Decoding .. Sync Pattern .. Data Signaling Frame Interval and Frame Interval Adjustment .. Data Source Signaling .. Hub Signaling Timings .. Receiver Data Jitter .. Cable Cable Bus Turn-around Time and Inter-packet Maximum End-to-end Signal Distribution .. of Drop Budget .. Control During Attach and Layer .. Requirements .. Timing/Electrical Characteristics .. Waveforms ..151 CHAPTER 8 PROTOCOL LAYER .. Field .. Field Formats .. Identifier Field .. Fields .. Number Field .. Field.

6 Redundancy Formats .. Packets .. Packets .. Packets .. Responses ..161 Universal Serial Bus Specification Revision Formats .. Transactions .. Toggle Synchronization and Retry .. via SETUP Token .. Data Transactions .. Corrupted or Not Accepted .. ACK Detection and Error Turn-around EOPs .. and Loss of Activity 9 USB DEVICE FRAMEWORK .. Device Device Enumeration .. USB Device Operations .. Attachment and .. Management .. Device .. Device Feature .. Descriptor .. Interface .. Status .. Configuration .. Descriptor .. Set Synch ..196 Universal Serial Bus Specification Revision USB Descriptor .. Class Definitions .. (s) and Endpoint Usage ..206 CHAPTER 10 USB HOST: HARDWARE AND SOFTWARE .. Overview of the USB Host .. Overview .. Control Mechanisms .. Data Flow .. Collecting Status and Activity Statistics .. Electrical Interface Considerations.

7 Host Controller Requirements .. State Handling .. Serializer/Deserializer .. Frame Data Processing .. Protocol Engine .. Transmission Error Handling .. Remote Wakeup .. Root Hub .. Host System Interface .. Overview of Software Device Configuration .. Resource Management .. Data Transfers .. Common Data Definitions .. Host Controller Universal Serial Bus Driver .. USBD Overview .. USBD Command Mechanism Requirements .. USBD Pipe Mechanisms .. Managing the USB via the USBD Passing USB Preboot Control to the Operating Operating System Environment 11 HUB Specification .. Overview .. Hub Architecture .. Hub Connectivity ..230 Universal Serial Bus Specification Revision Hub Frame Frame Timer Synchronization .. EOF1 and EOF2 Timing Points .. Host Behavior at End-of-Frame .. Latest Host Packet .. Packet Nullification.

8 Transaction Completion Prediction .. Internal Port .. Inactive .. Suspend Full Suspend (Fsus) .. Generate Resume (GResume) .. Downstream Ports .. Downstream Port State Descriptions .. Disconnect Detect Timer .. Upstream Transmitter .. Hub Repeater .. Wait for Start of Packet from Upstream Port (WFSOPFU) .. Wait for End of Packet from Upstream Port (WFEOPFU) .. Wait for Start of Packet (WFSOP) .. Wait for End of Packet (WFEOP) .. Bus State Evaluation .. Port Speed Collision .. Full- versus Low-speed Suspend and Hub Reset Hub Receiving Reset on Upstream Port .. Hub Port Power Multiple Gangs .. Hub I/O Buffer Pull-up and Pull-down Resistors .. Edge Rate Control .. Hub Controller .. Endpoint Organization .. Hub Information Architecture and Port Change Information Processing .. Hub and Port Status Change Bitmap .. Over-current Reporting and Recovery.

9 Hub Configuration ..261 Universal Serial Bus Specification Revision Descriptors .. Standard Descriptors .. Class-specific Descriptors .. Standard Requests .. Class-specific Requests .. 281 Universal Serial Bus Specification Revision 3-1. Application Space Taxonomy ..12 Figure 4-1. Bus Topology ..16 Figure 4-2. USB 4-3. A Typical 4-4. Hubs in a Desktop Computer Environment ..23 Figure 5-1. Simple USB Host/Device View ..25 Figure 5-2. USB Implementation Areas ..26 Figure 5-3. Host Composition ..27 Figure 5-4. Physical Device Composition ..28 Figure 5-5. USB Physical Bus 5-6. USB Logical Bus Topology ..30 Figure 5-7. Client Software-to-function Relationships ..30 Figure 5-8. USB Host/Device Detailed View ..31 Figure 5-9. USB Communication Flow ..32 Figure 5-10. USB Information Conversion From Client Software to 5-11. Transfers for Communication 5-12. Arrangement of IRPs to Transactions/Frames.

10 53 Figure 5-13. Non-USB Isochronous Example ..57 Figure 5-14. USB Isochronous 5-15. Example Source/Sink Connectivity ..66 Figure 5-16. Data Prebuffering ..70 Figure 5-17. Packet and Buffer Size Formulas for Rate-Matched Isochronous 6-1. Keyed Connector Protocol ..73 Figure 6-2. USB Detachable Cable Assembly ..75 Figure 6-3. USB Full-speed Hardwired Cable Assembly ..77 Figure 6-4. USB Low-speed Hardwired Cable Assembly ..79 Figure 6-5. USB 6-6. Typical USB Plug Orientation ..81 Figure 6-7. USB Series "A" Receptacle Interface and Mating Drawing ..83 Figure 6-8. USB Series "B" Recptacle Interface and Mating Drawing ..84 Figure 6-9. USB Series "A" Plug Interface 6-10. USB Series B Plug Interface 6-11. Typical Full-speed Cable Construction ..90 Figure 6-12. Single Pin-Type Series "A" Receptacle ..103 Universal Serial Bus Specification Revision 6-13. Dual Pin-Type Series "A" 6-14. Single Pin-Type Series "B" Receptacle.


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