XC95288XL High Performance CPLD - Xilinx

1 DS055 ( April 3, Specification1-800-255-7778 1998-2007 Xilinx , Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages-144-pin TQFP (117 user I/O pins)-208-pin PQFP (168 user I/O pins)-256-pin BGA (192 user I/O pins)-256-pin FBGA (192 user I/O pins)-280-pin CSP (192 user I/O pins)-Pb-free available for all packages Optimized for high - Performance systems-Low power operation-5V tolerant I/O pins accept 5V, , and or output capability-Advanced micron feature size CMOS Fast FLASH technology Advanced system features-In-system programmable-Superior pin-locking and routability with Fast CONNECT II switch matrix-Extra wide 54-input Function Blocks-Up to 90 product-terms per macrocell with individual product-term allocation-Local clock inversion with three global and one product-term clocks-Individual output enable per output pin with local inversion-Input hysteresis on all user and boundary-scan pin inputs-Bus-hold circuitry on all user pin inputs-Full IEEE Standard boundary-scan (JTAG))

2 Fast concurrent programming Slew rate control on individual outputs Enhanced data security features Excellent quality and reliability -Endurance exceeding 10,000 program/erase cycles-20 year data retention-ESD protection exceeding 2,000V Pin-compatible with 5V-core XC95288 device in the 208-pin HQFP packageWARNING: Programming temperature range of TA = 0 C to +70 CDescriptionThe XC95288XL is a CPLD targeted for high -perfor-mance, low-voltage applications in leading-edge communi-cations and computing systems. It is comprised of 1654V18 Function Blocks, providing 6,400 usable gates withpropagation delays of 6 ns. See Figure 2 for EstimationPower dissipation in CPLDs can vary substantially depend-ing on the system frequency, design application and outputloading. To help reduce power dissipation, each macrocellin a XC9500XL device may be configured for low-powermode (from the default high - Performance mode).

3 In addi-tion, unused product-terms and macrocells are automati-cally deactivated by the software to further conserve a general estimate of ICC, the following equation may beused:ICC(mA) = MCHS( *PTHS + ) + MCLP( *PTLP + ) + * MCTOG(MCHS +MCLP)* fwhere:MCHS = # macrocells in high -speed configurationPTHS = average number of high -speed product terms per macrocellMCLP = # macrocells in low power configurationPTLP = average number of low power product terms per macrocellf = maximum clock frequencyMCTOG = average % of flip-flops toggling per clock (~12%)This calculation was derived from laboratory measurementsof an XC9500XL part filled with 16-bit counters and allowinga single output (the LSB) to be enabled. The actual ICCvalue varies with the design application and should be veri-fied during normal system operation. Figure 1 shows theabove estimation in a graphical form.

4 For a more detaileddiscussion of power consumption in this device, see Xilinx0XC95288XL high Performance CPLDDS055 ( April 3, 200705 Product SpecificationRXC95288XL high Performance ( April 3, 20071-800-255-7778 Product SpecificationRapplication note XAPP114, Understanding XC9500 XLCPLD Power. Figure 1: Typical ICC vs. Frequency for XC95288 XLClock Frequency (MHz)Typical ICC (mA)100200250DS055_01_121501200250300350 4004505005505050150150100094 MHzHighPerformance208 MHzLowPowerXC95288XL high Performance CPLDDS055 ( April 3, Specification1-800-255-7778 RFigure 2: XC95288XL Architecture Function Block outputs (indicated by the bold line) drive the I/O Blocks Programming ControllerJTAGC ontrollerI/OBlocksFunctionBlock 1 Macrocells1 to 18 Macrocells1 to 18 JTAG Port354I/O/GTSI/O/GSRI/O/GCKI/OI/OI/OI/O 41I/OI/OI/OI/O3DS055_02_1013001 FunctionBlock 2541818 FunctionBlock 3 Macrocells1 to 18 Macrocells1 to 1854 FunctionBlock 16541818 FunctionBlock 4 Macrocells1 to 185418 Fast CONNECT II Switch MatrixXC95288XL high Performance ( April 3, 20071-800-255-7778 Product SpecificationRAbsolute Maximum Ratings(2)Recommended Operation ConditionsQuality and Reliability CharacteristicsDC Characteristic Over Recommended Operating ConditionsSymbolDescriptionValueUnitsVCC S upply voltage relative to GND to voltage relative to GND(1) to applied to 3-state output(1) to temperature (ambient)(3) 65 to +150oCTJJ unction temperature+150oCNotes.))))

5 DC undershoot below GND must be limited to either or 10 mA, whichever is easier to achieve. During transitions, the device pins may undershoot to or overshoot to + , provided this over- or undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA. External I/O voltage may not exceed VCCINT by beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device soldering guidelines and thermal considerations, see the Device Packaging information on the Xilinx website. For Pb-free packages, see voltage for internal logic and input buffersCommercial TA = 0oC to TA = 40oC to + voltage for output drivers for voltage for output drivers for input input voltage0 VCCIOVS ymbolParameterMinMaxUnitsTDRData Retention20-YearsNPEP rogram/Erase Cycles (Endurance)10,000-CyclesVESDE lectrostatic Discharge (ESD)2,000-VoltsSymbolParameterTest ConditionsMinMaxUnitsVOHO utput high voltage for outputsIOH = high voltage for outputsIOH = 500 A90% VCCIO-VVOLO utput low voltage for outputsIOL = low voltage for outputsIOL = 500 leakage currentVCC = Max; VIN = GND or VCC- 10 AIIHI/O high -Z leakage currentVCC = Max; VIN = GND or VCC- 10 AIIHI/O high -Z leakage currentVCC = Max; VCCIO = Max; VIN = GND or 10 AVCC Min < VIN < 50 ACINI/O capacitanceVIN = GND.

6 F = MHz-10pFICCO perating supply current(low power mode, active)VIN = GND, No load; f = MHz85 (Typical)mAXC95288XL high Performance CPLDDS055 ( April 3, Specification1-800-255-7778 RAC CharacteristicsSymbolParameterXC95288XL- 6XC95288XL-7XC95288XL-10 UnitsMinMaxMinMaxMinMaxTPDI/O to output setup time before hold time after GCK0-0-0-nsTCOGCK to output FB internal operating setup time before p-term clock hold time after p-term clock clock output to output to output term OE to output term OE to output to output OP-term S/R to output pulse width ( high or Low) preset/reset pulse width ( high or Low) clock pulse width ( high or Low) 3: AC Load CircuitDevice OutputOutput 320 250 R1R2 CLR2 360 660 CL35 pF35 high Performance ( April 3, 20071-800-255-7778 Product SpecificationRInternal Timing ParametersSymbolParameterXC95288XL-6XC95 288XL-7XC95288XL-10 UnitsMinMaxMinMaxMinMaxBuffer DelaysTINI nput buffer buffer buffer buffer buffer buffer enable/disabledelay-0-0-0nsProduct Term Control DelaysTPTCKP roduct term clock term set/reset term 3-state Register and Combinatorial DelaysTPDIC ombinatorial logic propagation setup hold clock enable setup clock enable hold clock to output valid async.))

7 S/R to output async. S/R recover before logic low power logic DelaysTFFast CONNECT II feedback AddersTPTAI ncremental product term allocator delay (first incremental delay) product term allocator delay (subsequent incremental delay) limited high Performance CPLDDS055 ( April 3, Specification1-800-255-7778 RXC95288XL I/O Pins(2)Func-tion BlockMacrocellTQ144PQ208 BG256 FG256 CS280 BScan OrderFunc-tion BlockMacrocellTQ144 PQ208 BG256 FG256 CS280 BScan Order11 8613 1 75312 28L1H1K2858322838P1L2N27501 3 29 L2H5K3855 3 3 39R1L5P174714 8523 4 744152030L3J1K484935 40P3M1P2741162131L4J5L184636 41R2L4P373817 8433 7 735182232M1J2L284038 43P4N1P473219 M2J3L383739 R3L3R172911023 33M3K1L4834 3 1030(1)44(1)T2(1)M2(1)R3(1)726111 M4J4M1831311 U1M4R27231122434N1K2M28283123145T3P1R472 0113 825313 71711425 35N2K5M3822 3 1432(1)46(1))

8 U2(1)M3(1)T1(1)7141 15 26 36N3L1M4819 3 15 3347V1N2T2711116 816316 7081172737N4K3N1813317 48T4N4T3705118 810318 70221 8074 1 6992 2 9 15 G2D1G3804 4 2 2(1)3(1)C2(1)D3(1)C2(1)696231016G1G4G280 143 4D2D2B169324 7984 4 690251117H4E1G1795453(1)5(1)D3(1)E3(1)C1 (1)687261218H3G3G47924646E4C2D468427 7894 7 681281319H2G2H1786485(1)7(1)C1(1)D4(1)D3 (1)67829 H1F5H378349 D1B1D26752101420J4F1H2780410 8E3E4D16722 11 J3 G5 H4777 4 11 E2 C1 E366921215 21J2H2J1774 4 126(1)9(1)E1(1)E5(1)E2(1)666213 771413 6632141622J1H4J2768414710F3E2E4660215172 3K2G1J3765415 12F2F2F3657216 762416 6542171925K1H3J4759417 14G3E6F4651218 756418 648 Notes: control pin-outs are the same for Pb-free versions of high Performance ( April 3, 20071-800-255-7778 Product SpecificationR51 6457 1 537523449U3R1U164272 62W6R3W553453 50V2N3V1639734563Y6M6U653154 6367 4 528553551V3P2U2633754664V7T3V65255 6 54Y2P4V3630 7 6 66U8T4W652257 6277 7 5195838(1)55(1)W4(1)P5(1)W2(1))

9 62478 67W7P7U751659 V4T2W362179 Y7T5V75135103956U5N5T4618710 69V8N7W7510511 Y3R4U4615711 W8R7T75075 12 40 57 Y4M5V4612 7 12 48 70 Y8M7W8504513 609713 5015144158V5R5W4606714 71U9T6U84985154360V6R6V56037154972V9N8V8 495516 600716 4925174461U7N6T5597717 73W9T7T8489518 594718 48661 5918 1 - 48362135197D7A5D758882130186A9E11B104806 3136198C6D6A658583131187B9A8C1047764 5828 4 47465137199B5B5B657985132188C9C8D1047166 138200A4C6C657686 189D9B8A946867 5738 7 46568139201C5A4D657088133191A8D8B946269 B4E7A556789 B8A7C9459610140202A3A3C5564810134192C8E9 D9456611 D5C5B5561811 D8B7A8453612 203C4A2D5558812 193A7D7B8450613 555813 447614142205B2B4B4552814 194B7A6C8444615143(1)206(1)A2(1)C4(1)C4( 1)549815 195B6B6B7441616 546816 438617 208C3B3A3543817 196A5E8C7435618 540818 432 Notes: control pin-outs are the same for Pb-free versions of I/O Pins (Continued)(2)

10 Func-tion BlockMacrocellTQ144PQ208 BG256 FG256 CS280 BScan OrderFunc-tion BlockMacrocellTQ144 PQ208 BG256 FG256 CS280 BScan OrderXC95288XL high Performance CPLDDS055 ( April 3, Specification1-800-255-7778R91 429111 321925074Y11R8U9426112 87Y15P10W13318935175W11P8T94231136088V14 T12V1331594 420114 312955276V11T8W104171156189W15N10U133099 65377U11M8V10414116 90Y16T13T1330697 4 11117 303985478Y12T9U10408118 91U14M11W1430099 W12P9W11405119 Y17N11T14297910 80V12R9V1140211106495V16T14W152949115682 U12M9U1139911116697Y18R12V152919125783Y1 3T10T1139611126899V17T15W16288913 3931113 2859145884W13M10W12390111469100Y19R14U16 282915 85V13R10V123871115 101V18N13W17279916 3841116 2769175986W14T11T12381111770102W19R13W18 273918 3781118 270101 375121 267102117170A14B11C14372122110158B18B13B 19264103118171C13D11B14369123111159C17B1 4B18261104 366124 258105119173B13A11A14363125112160D16C13B 17255106120174A13D10C13360126 161A18A15A18252107 357127 249108121175D12B10B13354128113162A17C12A 17246109)