Xilinx DS152 Virtex-6 FPGA Data Sheet: DC and AC …

1 DS152 ( ) March 18, Specification1 2009 2014 Xilinx , Inc. Xilinx , the Xilinx logo, Virtex, Zynq, Artix, Kintex, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective FPGA Electrical CharacteristicsVirtex -6 FPGAs are available in -3, -2, -1, and -1L speed grades, with -3 having the highest performance. Virtex-6 FPGA DC and AC characteristics are specified in commercial, extended, industrial, and military temperature ranges. Unless noted, the Virtex-6Q FPGA DC and AC characteristics are equivalent to the commercial specifications.

2 Except for the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade industrial device are the same as for a -1 speed grade commercial device). However, only selected speed grades and/or devices are available in the extended, industrial, or military temperature supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical device and package combinations can be found at: DS150: Virtex-6 Family Overview DS155: Defense-Grade Virtex-6Q Family OverviewThis Virtex-6 FPGA data sheet, part of an overall set of documentation on the Virtex-6 FPGAs, is available on the Xilinx website at: FPGA DC characteristics Virtex-6 FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, 2014 Product SpecificationTa b l e 1 :Absolute Maximum Ratings(1)SymbolDescriptionRangeUnitsVCC INTI nternal supply voltage relative to GND to -1L devices.

3 Internal supply voltage relative to GND to supply voltage relative to GND to drivers supply voltage relative to GND to memory battery backup supply to voltage supply for eFUSE programming(2) to reference voltage to (3) or below I/O input voltage relative to GND(4) (user and dedicated I/Os) to VCCO+ applied to 3-state or below output(4) (user and dedicated I/Os) to VCCO+ temperature (ambient) 65 to 150 CTSOLM aximum soldering temperature(5)+220 CTjMaximum junction temperature(5)+125 CNotes: beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.

4 Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device not programming eFUSE, connect VFS to I/O absolute maximum limit applied to DC and AC I/O operation, refer to UG361: Virtex-6 FPGA SelectIO Resources User soldering guidelines and thermal considerations, see UG365: Virtex-6 FPGA Packaging and Pinout FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, Specification2 Ta b l e 2 :Recommended Operating ConditionsSymbolDescriptionMinMaxUnitsVC CINTI nternal supply voltage relative to GND for all devices except -1L -1L commercial temperature range devices: internal supply voltage relative to GND, Tj= 0 C to +85 -1L industrial temperature range devices: internal supply voltage relative to GND, Tj= 40 C to +100 supply voltage relative to (1)(2)(3)Supply voltage relative to supply voltage relative to GNDGND and below supply voltage relative to GNDGND VCCO+ (5)Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode.

5 10mAVBATT(6)Battery voltage relative to (7)External voltage supply for eFUSE temperature operating range for commercial (C) temperature devices085 CJunction temperature operating range for extended (E) temperature devices0100 CJunction temperature operating range for industrial (I) temperature devices 40100 CJunction temperature operating range for military (M) temperature devices 55125 CNotes: data is retained even if VCCO drops to VCCO of , , , and configuration supply voltage VCC_CONFIG is also known as voltages are relative to total of 100 mA per bank should not be is required only when using bitstream encryption.

6 If battery is not used, connect VBATT to either ground or eFUSE programming, VFS must be within the recommended operating range and Tj=+15 C to +85 C. Otherwise, VFS can be connected to FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, Specification3 Ta b l e 3 :DC characteristics Over Recommended Operating Conditions(1)(2)SymbolDescriptionMinTypM axUnitsVDRINTData retention VCCINT voltage (below which configuration data might be lost) VVDRIData retention VCCAUX voltage (below which configuration data might be lost) VIREFVREF leakage current per pin 10 AILI nput or output leakage current per pin (sample-tested) 10 ACIN(3)Die input capacitance at the pad 8pFIRPUPad pull-up (when selected) @ VIN=0V, VCCO= 80 APad pull-up (when selected) @ VIN=0V, VCCO= 40 APad pull-up (when selected) @ VIN=0V, VCCO= 30 APad pull-up (when selected) @ VIN=0V, VCCO= 20 AIRPDPad pull-down (when selected)

7 @ VIN= 80 AIBATTB attery supply current 150nAnTemperature diode ideality factor nrSeries resistance 5 Notes: values are specified at nominal voltage, 25 value specified for worst case process at 25 measurement represents the die capacitance at the pad, not including the FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, Specification4 Important NoteTypical values for quiescent supply current are specified at nominal voltage, 85 C junction temperatures (Tj). Xilinx recommends analyzing static power consumption at Tj= 85 C because the majority of designs operate near the high end of the commercial temperature range.

8 Quiescent supply current is specified by speed grade for Virtex-6 devices. Use the Xilinx Power Estimator (XPE) spreadsheet tool (download at ) to calculate static power consumption for conditions other than those specified in Ta b l e b l e 4 :Typical Quiescent Supply CurrentSymbolDescriptionDeviceSpeed and Temperature GradeUnits-3 (C)-2 (C, E, & I) -1 (C & I) -1 (I & M)(2)-1L (C)-1L (I)(1)ICCINTQQ uiescent VCCINT supply currentXC6 VLX75T927927927N/A656741mAXC6 VLX130T156315631563N/A11021245mAXC6 VLX195T205920592059N/A14411628mAXC6 VLX240T247824782478N/A17331957mAXC6 VLX365T300130013001N/A20922363mAXC6 VLX550T(3)N/A45154515N/A31473555mAXC6 VLX760(3)N/A50945094N/A34713921mAXC6 VSX315T347634763476N/A24092721mAXC6 VSX475T(3)N/A52275227N/A36224091mAXC6 VHX250T290629062906N/AN/AN/AmAXC6 VHX255T274627462746N/AN/AN/AmAXC6 VHX380T(4)416041604160N/AN/AN/AmAXC6 VHX565T(5)

9 N/A52075207N/AN/AN/AmAXQ6 VLX130TN/A1563N/A1563N/A1245mAXQ6 VLX240TN/A2478N/A2478N/A1957mAXQ6 VLX550T(7)N/AN/AN/A4515N/A3555mAXQ6 VSX315TN/A3476N/A3476N/A2721mAXQ6 VSX475T(7)N/AN/AN/A5227N/A4091mAVirtex-6 FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, Specification5 ICCOQQ uiescent VCCO supply currentXC6 VLX75T111N/A11mAXC6 VLX130T111N/A11mAXC6 VLX195T111N/A11mAXC6 VLX240T222N/A22mAXC6 VLX365T222N/A22mAXC6 VLX550T(3)N/A33N/A33mAXC6 VLX760(3)N/A33N/A33mAXC6 VSX315T222N/A22mAXC6 VSX475T(3)N/A22N/A22mAXC6 VHX250T111N/AN/AN/AmAXC6 VHX255T111N/AN/AN/AmAXC6 VHX380T(4)222N/AN/AN/AmAXC6 VHX565T(5)N/A22N/AN/AN/AmAXQ6 VLX130TN/A1N/A1N/A1mAXQ6 VLX240TN/A2N/A2N/A2mAXQ6 VLX550T(7)N/AN/AN/A3N/A3mAXQ6 VSX315TN/A2N/A2N/A2mAXQ6 VSX475T(7)N/AN/AN/A2N/A2mATa b l e 4.

10 Typical Quiescent Supply Current (Cont d)SymbolDescriptionDeviceSpeed and Temperature GradeUnits-3 (C)-2 (C, E, & I) -1 (C & I) -1 (I & M)(2)-1L (C)-1L (I)(1) Virtex-6 FPGA Data Sheet: DC and switching CharacteristicsDS152 ( ) March 18, Specification6 Power-On Power Supply RequirementsXilinx FPGAs require a certain amount of supply current during power-on to insure proper device initialization. The actual current consumed depends on the power-on sequence and ramp rate of the power recommended power-on sequence for Virtex-6 devices is VCCINT, VCCAUX, and VCCO to meet the power-up current requirements listed in Ta b l e 5. VCCINT can be powered up or down at any time, but power up current specifications can vary from Ta b l e 5.