Verilog-A Language Reference Manual - SIUE

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verilog -ALanguage Reference ManualAnalog Extensions to verilog HDLVersion 1, 1996Open verilog InternationalNo part of this work covered by the copyright hereon may be reproduced or used in any form or by any means --- graphic, electronic, or mechanical, including photocopying, recording, taping, or information storage andretrieval systems --- without the prior written approval of Open verilog copies of this Manual may be purchased by contacting Open verilog International at the addressshown information contained in this draft Manual represents the definition of the Verilog-A hardware descriptionlanguage as proposed by OVI (Analog TSC) as of January, 1996. Open verilog International makes no warran-ties whatsoever with respect to the completeness, accuracy, or applicability of the information in this draft man-ual to a user s requirements.

Version 1.0 Verilog-A Language Reference Manual v Table of Contents Verilog-A HDL Overview Overview .....1-1

  Overview, Verilog, Overview overview, Verilog a