Transcription of 16-Bit, Six-Channel, Simultaneous Sampling Analog-to ...
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94929088868482807876747270 Signal-to-Noise Ratio (dB)-40-25-10520355065125 Temperature ( C) 8095 110 AVDD = BVDD = 5 VHVSS = 15V, HVDD = 15Vf= 10kHz, f= MaxRange = 4 VInternal Reference- SIGNALDATAREFSAR /WRRESETENSTBYCSRD/DB[15:0]WORD/BYTEPAR/ SERFSCH_A0 CONVST_AAGNDREFC_AREF_IOAVDDBVDDBGNDAGND HVDDHVSSC ontrolLogicConfigRegisterI/OSAR ADCCH_A1 AGNDSAR ADCCH_B0 CONVST_BAGNDREFC_BSAR ADCCH_B1 AGNDSAR ADCCH_C0 CONVST_CAGNDREFC_CSAR ADCCH_C1 AGNDC lockGeneratorProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityReferenceDesignAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand DECEMBER2010 REVISEDFEBRUARY2016 ADS855516-Bit, Six-Channel, SimultaneousSa mplingAnalog-to-DigitalConverter11 Features1 Six SARADCsGroupedin ThreePairs MaximumDataRatePer ChannelWithInternalClockand Reference:630 kSPS(Parallel)or 450 kSPS(Serial) MaximumDataRatePer ChannelWithExternalClockand Reference:800 kSPS(Parallel)or 500 kSPS(Serial) Pin-Selectableor ProgrammableInputVoltageRanges.
94 92 90 88 86 84 82 80 78 76 74 72 70 Signal-to-Noise Ratio (dB) - 40 - 25 - 10 5 20 35 50 65 125 Temperature ( C) ° 80 95 110 AVDD = BVDD = 5V HVSS = 15V, HVDD = 15V
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Mathematics (Linear) 1MA0 SIMULTANEOUS EQUATIONS, Mathematics (Linear) – 1MA0 SIMULTANEOUS EQUATIONS, The simultaneous saccharification and fermentation of, The simultaneous saccharification and fermentation, Simultaneous, Simultaneous atomic-resolution electron ptychography, Simultaneous linear equations