Transcription of Flux/underfill Compatibility Study for Flip-chip …
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Flux/underfill Compatibility Study for Flip-chip Assembly Process Phuthanate Phoosekieaw1+and Sanya Khunkhao1 1 Faculty of Engineering, Department of Electrical Engineering Sripatum University, 61 Phaholyothin Rd, Jatujak, Bangkok 10900, Tel (662) 579-1111 Ext: 2272 Abstract. The rapid uptake of Flip-chip technology within the electronics industry due to their better thermal performance, smaller size, lower profile, light weight, and higher input/output density, the solder joints together with underfill in flip chip package serve as a mechanical mechanism for resisting the thermal deformation induced by the coefficient of thermal expansion (CTE) mismatch between silicon die and substrate.
2. Preparation and Experimental Procedure 2.1. Assembly The test component was a GNRU07-003LF IC GNR FLIPCHIP NP4* with polyimide passivation. Two lead-free alloys were used as bump metallurgy [1]: Sn/3.5 Ag/0.5 Cu and Sn/3.0 Ag/1.0 Cu.
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