Transcription of History of FET technology and the move to NexFET™
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History of FET technology and the move to NexFET™
44As the power MOSFET s performance improved, it followed the evo-lution of CMOS technology introduced in the late 70s to produceintegrated circuits. Typically, power FET technology uses depreciatedCMOS foundries, following the leading edge with a time delay in theorder of three-to-five years with a feature size of: 1 m, m, m, m, m, m, etc. Geometry scaling leads todrop-in supply voltage of very large scale integrated (VLSI) circuitsused in electronic applications like computing, portable electronicsand telecommunications. As a consequence, power supply convertertopologies moved towards lower voltage, higher current and a needto better control the power level delivered to the first-generation of macrocell power MOSFET transistors, double-diffused MOSFET (DMOS), was successfully introduced into the mar-ket in the early 80s by International Rectifier.
44 As the power MOSFET’s performance improved, it followed the evo-lution of CMOS technology introduced in the late ‘70s to produce integrated circuits.
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