Transcription of MOS TRANSISTOR REVIEW
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EE 316 / Prof. SaraswatHandout 5 MOS TRANSISTOR REVIEW3D band diagram of a long channel enhancement mode NMOS transistorVG = VD = 0VG > VTVD > 0VG > 0VD = 0EE 616 / +N+V (+) D+VDGPN+N+V (+) D+VD (small)GInversionLayerDepletionRegionDPN +N+V V > VGInversion layer ends IDVDIDVDIDVDDPN+N+V V = VGInversion layerpinches offDSATIDVDDSATMOS Transistor3 From EE216 notes:Drain currentIJ dydzWQE dyDxInx== Charge density in the channel:QI(y)= CoxVG VT(y)[]Gate voltage required to induce inversion under the influence of VDVT(y)=VFB+1 Cox2 sqNa 2 p VB V(y)()[] 2 p+V(y)Solving the above 3 equations we get ID VD characteristicsLinear RegionID=WL n CoxVG VT[]VDSaturation RegionIDSAT W2L n oxtoxVG VT()2 EE 616 / Device ScalingNaPN+N+LxoxXjolPN+N+SGDS caled MOS TransistorWhy do we scale mos transistors ?
MOS Device Scaling Na P N+ N+ L xox Xj o l P N+ S G D Scaled MOS Transistor Why do we scale MOS transistors? 1. Increase device packing density 2. Improve frequency response (transit time) α 1 L 3. Improve current drive (transconductance gm) g I V V const W L K t V V linear region W L K t V V V saturation region m D G D n ox ox DD n ox ox GT D ...
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