Software Developer Guide - Xilinx
Chapter 11: Power Management Framework Updated Zynq UltraScale+ MPSoC Power Management Software Architecture, Using the API for Power Management , Sub-system Power Management, and XilPM Implementation Details sections Chapter 16: Boot Image Creation Updated BIF File Parameters, Boot Image Format and Boot Header Table. 05/03/2017 Version …
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www.xilinx.comS u m m a r y The Xilinx® Zynq® UltraScale+™ MPSoCs are available in -3, -2, -1 speed grades, with -3E devices having the highest performance. The -2LE and -1LI devices can operate at a VCCINT voltage at 0.85V or 0.72V and are screened for lower maximum static power. When operated at VCCINT = 0.85V, using -2LE and -1LI devices, the speed specification for the L …