Layout of Analog CMOS Integrated Circuit

1 F. Maloberti - Layout of Analog cmos IC1 Franco MalobertiLayout of Analog CMOSI ntegrated CircuitPart 3 Passive components: Resistors, CapacitorsF. Maloberti - Layout of Analog cmos IC2 Outline Introduction Process and Overview Topics Transistors and Basic Cells Layout Passive components: Resistors, Capacitors System level Mixed-signal LayoutF. Maloberti - Layout of Analog cmos IC3 Integrated CapacitorsCapacitors in IC are parallel plate capacitorsWLtCoxr0 =No fringing effectSiO2 Dry OxideSiO2 PlasmaSi3N4 LPCVDSi3N4 PlasmaRel.

2 PermittivityDiel. V/nm3-6 V/nm10 V/nm5 V/nmF. Maloberti - Layout of Analog cmos IC4 Types of Integrated CapacitorsPoly-polySandwich Lateral plates(flux capacitor)Poly- diffusionPoly-channelF. Maloberti - Layout of Analog cmos IC5 Electrodes : metal ; polysilicon; diffusionInsulator : silicon oxide; polysilicon oxide; CVD oxide222oxox2rr2 WWLLttCC + + + = WLtCoxr0 =Features of Integrated CapacitorsExtra maskF. Maloberti - Layout of Analog cmos IC6 rr oxoxtt WW;LL Oxide damage Impurities Bias condition Bias history (for CVD) Stress Temperature Etching Alignment Grow rate Poly grain sizeFactor affecting accuracyF.

3 Maloberti - Layout of Analog cmos IC7To achieve good matching : Use of unity capacitors connected in parallel Use W = L fairly largepoly 1metalcontactpoly 2poly 1contactpoly 2on thickoxidearea withoutpoly 1(thick oxide) Layout of CapacitorsF. Maloberti - Layout of Analog cmos IC8 Flux Capacitor Layout Use of the same metal layer Exploit the lateral flux The parasitic capacitanceplate -substrate is lowbecause the metal sits onthick oxide Use thick metal layers Maximize the perimeter (useof fractals) Very good matching!

4 F. Maloberti - Layout of Analog cmos IC9C1TC1C5TC5C2TC2C3TC3C4TC4C2 = C1C3 = 2C1C4 = 4C1C5 = 8C1 Common Centroid StructuresF. Maloberti - Layout of Analog cmos IC9F. Maloberti - Layout of Analog cmos IC10 Matching accuracy is better than matched resistors, because : (because the capacitors are square) << rrrescapWWWW < < jjoxoxxxttMatching of CapacitorsF. Maloberti - Layout of Analog cmos IC11W = W - 2xL = L - 2xEffective area :A = W L = WL - 2(L + W)xA = A - PxThe undercut effect gives thesame proportional reduction ifthe perimeter-area ratio is keptconstantUndercut EffectF.

5 Maloberti - Layout of Analog cmos IC12 Matched Capacitors: Exercise Layout the following three capacitors C1= pF C2= pF C3= pF The absolute accuracy is not important. What matter is thecapacitance Maloberti - Layout of Analog cmos IC13 Fringing EffectFringingfield Equation is an approximation Fringing depends on the boundary conditionsWLtCoxr0 =toxtoxfringoxoxoxrCtLtWtC+ =))((0 F. Maloberti - Layout of Analog cmos IC14toxnm15 - 2015 -25500 - 7001200 - 1400800 - 1200 Accuracy%7 - 146 - 126 - 126 - 126 - 12 TemperatureCoefficientppm/oC20 - 5020 - 5050 - 10050 - 10050 - 100 VoltageCoefficientppm/V60 - 30040 - 20040 - 20060 - 30040 200 Typepoly - I - poly IImetal - polymetal - I - metal IIMOS Capacitors FeaturesF.

6 Maloberti - Layout of Analog cmos IC15diffusionpoly-poly or poly-metalCp, CCp, CParasitic CapacitancesHigh impedancenode connectedto the top plateF. Maloberti - Layout of Analog cmos IC16 Rules for Capacitor Matching Use identical geometries Use large unity capacitance (minimize fringing) Use common centroid arrangement Use dummy capacitors Use shielding Account for the connections contribution Don t run connections over capacitor Place capacitor in low stress areas Place capacitors far from power devicesF. Maloberti - Layout of Analog cmos IC17 Integrated Capacitors Issues to remember Use unit capacitors Make bigger capacitors integer multiples of theunit capacitor Use common centroid Layout to match capacitors Use multiple contacts to lower series resistanceF.

7 Maloberti - Layout of Analog cmos IC18 Integrated resistor Cross-section A resistor is made of a strip of resistive layer. The endings resistance can be significant!RWLR2 Rcont+=F. Maloberti - Layout of Analog cmos IC19a,b) diffusionDiffused Resistancesc) n-well (or p-well)d) Pinched wellF. Maloberti - Layout of Analog cmos IC20 Polysilicon ResistancesConductive layers can be used to shieldthe conductor-oxide-conductor structureF. Maloberti - Layout of Analog cmos IC21 Well or Pinched-well Resistors Well layers have a largespecific resistance but They have a large voltageand temperature coefficient They are weakly insulatedfrom the surrounding Layers close to the surfacecontribute to the conductivityF.

8 Maloberti - Layout of Analog cmos IC22In order to have large value resistors : Use of long strips (large L/W) Use of layers with high sheet resistance (bad performances) Layout : rectangular snake (!!)Resistance at the cornersCurrent flows in different directionsDON T USE IT IN PRECISEAPPLICATIONS!Large Value ResistorsF. Maloberti - Layout of Analog cmos IC23 Prevent Current Leakage!N-WellSubstrate biasn+ diffusionp+ diffusionPrevents lateral leakageF. Maloberti - Layout of Analog cmos IC24 Features of ResistorsSheetResistance /030 - 5050 -1502K - 4K3K - 6K6K - 10K9K - 13K20 - 4015 - 40 Accuracy%20 - 4020 - 4015 - 3015 - 3025 - 4025 - 4025 - 4025 - 40 TemperatureCoefficientppm/oC200 - 1K200 - 1K5K5K10K10K500 - 1500500 - 1500 VoltageCoefficientppm/V50 - 30050 - 30010K10K20 20 20 - 20020 - 200 Typeof layern + diffp + diffn - wellp - wellpinched n - wellpinched p - wellfirst polysecond polyF.

9 Maloberti - Layout of Analog cmos IC25If the parameter are statistically independent the standard deviation of theresistance is :Since in general L >> W2jj2222xxWWLLRR + + + = << WWLLjxWLRWLR == resistor s AccuracyF. Maloberti - Layout of Analog cmos IC26for polysilicon resistors is larger than for diffused resistors.(Polysilicon is composed of a conglomerate of independently oriented grainof crystalline silicon)Accuracy :Absolute accuracy is poor because of the large parameter driftRatio (or matching) accuracy is better because it depends on the localvariation of parameters.

10 resistor s Accuracy (cont.)F. Maloberti - Layout of Analog cmos IC27 jjxx WW;LL Polysilicon grain size Doping dose Crystal defects Stress Temperature Etching Boundary Side diffusivity Implant dose Side diffusivity Deposition rateFactor Affecting AccuracyF. Maloberti - Layout of Analog cmos IC28 Plastic packages cause a large pressure on the die (= 800 Atm.). It determinesa variation of the <100> material the variation is unisotropic, so the minimum is get if theresistance have a 45o :Temperature gradient on thechip may produce thermalinduced ElementsF.