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LT3758/LT3758A (Rev. G) - Analog Devices
www.analog.comINTVCC Current in Shutdown SHDN/UVLO = 0V, INTVCC = 8V 16 µA INTVCC Voltage to Bypass Internal LDO 7.5 V Logic Inputs SHDN/UVLO Threshold Voltage Falling VIN l= INTVCC = 8V 1.17 1.22 1.27 V SHDN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.4 V SHDN/UVLO Pin Bias Current Low SHDN/UVLO = 1.15V 1.7 2 2.5 µA
Bias Circuits for RF Amplifiers - QSL.net
www.qsl.net• For good gain characteristics, it is necessary to bias the transistor at a collector current that results in maximum or near-maximum f t. • On the other hand, for best noise characteristics, a low current is generally most desirable. Finally, one must consider the maximum signal level expected at the input of the transistor.