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CMOS Technology and Logic Gates - MIT OpenCourseWare
ocw.mit.eduWet Etching ETCHING Isotropic Anisotropic UV Light Photomask SiO SiO SiO SiO Photoresist SiO Dry Etching 6.884 – Spring 2005 Figure by MIT OCW. 2/07/2005 L03 – CMOS Technology 9 . FET = Field-Effect Transistor The four terminals of a fet (gate, source, drain and bulk)