AOZ8844 - Alpha and Omega Semiconductor

1 AOZ8844 . Ultra-Low Capacitance TVS Diode General Description Features The AOZ8844 is a transient voltage suppressor array ESD protection for high -speed data lines: designed to protect high speed data lines such as hdmi , IEC 61000-4-2, level 4 (ESD) immunity test USB , MDDI, SATA, and Gigabit Ethernet from Air discharge: 20 kV; contact discharge: 15 kV. damaging ESD events. IEC61000-4-4 (EFT) 40 A (5/50 nS). IEC61000-4-5 (Lightning) +5 A (8/20 S). This device incorporates eight surge rated, low Human Body Model (HBM) 24 kV. capacitance steering diodes and a TVS in a single package. During transient conditions, the steering diodes Array of surge rated diodes with internal TVS diode direct the transient to either the positive side of the power Small package saves board space supply line or to ground. Protects four I/O lines Low capacitance between I/O lines: pF. The AOZ8844 provides a typical line-to-line capacitance Low clamping voltage of pF and low insertion loss up to 6 GHz providing greater signal integrity making it ideally suited for hdmi or USB applications, such as Digital TVs, Applications DVD players, computing, set-top boxes and MDDI hdmi , USB , MDDI, SATA ports applications in mobile computing devices.

2 Monitors and flat panel displays Set-top box The AOZ8844 comes in a RoHS compliant and Halogen Free mm x mm x mm DFN-5 package and is Video graphics cards rated for -40 C to +125 C junction temperature range. Digital Video Interface (DVI). Notebook computers Typical Applications AOZ8844 AOZ8844 . AOZ8802A. TX2+ RX2+. TX2- RX2- D+ D+. D- D- TX1+ RX1+. USB USB TX1- RX1- Transceiver Connector hdmi hdmi . Transmitter Receiver SSRX+ SSRX+ TX0+ RX0+. SSRX- SSRX- TX0- RX0- SSTX+ SSTX+ CLK+ CLK+. SSTX- SSTX- CLK- CLK- Connector Connector AOZ8844 . AOZ8844 AOZ8844 . Figure 1. USB Ports Figure 2. hdmi Ports Rev. July 2013 Page 1 of 8. AOZ8844 . Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ8844DT -40 C to +85 C mm x mm x mm DFN-5 Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit for additional information. Pin Configuration CH1 1. 5 CH4. VN 2.

3 4 CH3. CH2 3. DFN-5. (Top View). Absolute Maximum Ratings Exceeding the Absolute Maximum ratings may damage the device. Parameter Rating Storage Temperature (TS) -65 C to +150 C. (1)(3). ESD Rating per IEC61000-4-2, contact 15 kV. (1)(3). ESD Rating per IEC61000-4-2, air 20 kV. ESD Rating per Human Body Model(2)(3) 24 kV. Notes: 1. IEC 61000-4-2 discharge with CDischarge = 150pF, RDischarge = 330 . 2. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100 pF, RDischarge = k . Maximum Operating Ratings Parameter Rating Junction Temperature (TJ) -40 C to +125 C. Rev. July 2013 Page 2 of 8. AOZ8844 . Electrical Characteristics TA = 25 C unless otherwise specified. Symbol Parameter Diagram IPP Maximum Reverse Peak Pulse Current I. VCL Clamping Voltage @ IPP (IEC61000-4-5 8/20 s pulse) IF. VRWM Working Peak Reverse Voltage IR Maximum Reverse Leakage Current VBR Breakdown Voltage VCL VBR VRWM. IR VF. V. IT Test Current IT.

4 VF Forward Voltage @ IF (IF = 15 mA). Ppk Peak Power Dissipation (IEC61000-4-5 8/20 s pulse) IPP. CJ Capacitance @ VR = 0 and f = 1 MHz VBR (V) VCL Max.(3) CJ (pF). Device VRWM (V) Min. IR ( A) VF (V). Device Marking Max. IT = 100 A Max. Typ. IPP = 2 A IPP = 5 A PPK (W) Typ. Max. AOZ8844DT A 32 Notes: 3. These specifications are guaranteed by design and characterization. Rev. July 2013 Page 3 of 8. AOZ8844 . Typical Performance Characteristics Clamping Voltage vs. Peak Pulse Current Capacitance vs. Reverse Bias (IEC61000-4-5 8/20 s pulse current). 8 Normalized Capacitance 7 Clamping Voltage (V). 6 5 4 3 2 0. 2 0 1 2 3 4 5. Peak Pulse Current (A) Reverse Bias (V). IO-GND Insertion Loss (S21) vs. Frequency IO-IO Insertion Loss (S21) vs. Frequency 0 0. -1 -1. -2. dB (S21). -2. dB (S21). -3 -3. -4 -4. -5 -5. 1 10 100 1000 10000 1 10 100 1000 10000. Frequency (MHz) Frequency (MHz). Rev. July 2013 Page 4 of 8. AOZ8844 . high Speed PCB Layout Guidelines PCB can be improved by minimizing the impedance with relatively short and wide ground traces.

5 The PCB layout Printed circuit board layout is the key to achieving the and IC package parasitic inductances can cause highest level of surge immunity on power and data lines. significant overshoot to the TVS's clamping voltage. The The location of the protection devices on the PCB is the inductance of the PCB can be reduced by using short simplest and most important design rule to follow. The trace lengths and multiple layers with separate ground AOZ8844DT devices should be located as close as and power planes. One effective method to minimize possible to the noise source. The AOZ8844DT device loop problems is to incorporate a ground plane in the should be placed on all data and power lines that enter or PCB design. exit the PCB at the I/O connector. In most systems, surge pulses occur on data and power lines that enter the PCB The AOZ8844DT ultra-low capacitance TVS is designed through the I/O connector. Placing the AOZ8844DT to protect four high speed data transmission lines from devices as close as possible to the noise source ensures transient over-voltages by clamping them to a fixed that a surge voltage will be clamped before the pulse can reference.

6 The low inductance and construction be coupled into adjacent PCB traces. In addition, the minimizes voltage overshoot during high current surges. PCB should use the shortest possible traces. A short When the voltage on the protected line exceeds the trace length equates to low impedance, which ensures reference voltage the internal steering diodes are forward that the surge energy will be dissipated by the biased, conducting the transient current away from the AOZ8844DT device. Long signal traces will act as sensitive circuitry. The AOZ8844DT is designed for ease antennas to receive energy from fields that are produced of PCB layout by allowing the traces to run underneath by the ESD pulse. By keeping line lengths as short as the device. The pinout of the AOZ8844DT is designed to possible, the efficiency of the line to act as an antenna for simply drop onto the IO lines of a high Definition ESD related fields is reduced.

7 Minimize interconnecting Multimedia Interface ( hdmi ) or USB design without line lengths by placing devices with the most interconnect having to divert the signal lines that may add more as close together as possible. The protection circuits parasitic inductance. Pins 1, 2, 4 and 5 are connected to should shunt the surge voltage to either the reference or the internal TVS devices and pins 6, 7, 9 and 10 are no chassis ground. Shunting the surge voltage directly to the connects. The no connects was done so the package can IC's signal ground can cause ground bounce. The be securely soldered onto the PCB surface. clamping performance of TVS diodes on a single ground Clock Clock SSRX+ SSRX+. Data0 Data0 SSRX SSRX . Ground Ground Ground Ground Data1 Data1 SSTX+ SSTX+. Data2 Data2 SSTX SSTX . Figure 3. Flow Through Layout for hdmi Figure 4. Flow Through Layout for USB . Rev. July 2013 Page 5 of 8. AOZ8844 . Package Dimensions, DFN x x , 5L.

8 5xL. D e1. A1. A. E. A2. 2 1 5xb e TOP VIEW SIDE VIEW. BOTTOM VIEW. RECOMMENDED LAND PATTERN Dimensions in Millimeters Dimensions in Inches Symbols Min. Nom. Max. Symbols Min. Nom. Max. A A A1 A1 A2 ( ) A2 ( ). b b D D E E e BSC e BSC. e1 BSC e1 BSC. Unit: mm L L Notes: 1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact. 2. Land pattern dimensions are only for reference. Rev. July 2013 Page 6 of 8. AOZ8844 . Tape and Reel Dimensions, DFN x x , 5L. Carrier Tape P1. P2. T D1. E1. E2 E. B0. K0 A0 D0 P0. Feeding Direction UNIT: mm Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T. DFN (8mm) + Reel W1. S. G. N K. M. V. R. H. W. UNIT: mm Tape Size Reel Size M N W W1 H K S E R R. 8mm 178 . + / Leader / Trailer & Orientation Trailer Tape Components Tape Leader Tape 300mm Min. OR Orientation in Pocket 500mm Min. OR. 75 Empty Pockets 125 Empty Pockets Rev. July 2013 Page 7 of 8. AOZ8844 . Part Marking AOZ8844DT.

9 ( x DFN). A A. Part Number Code Month Code LEGAL DISCLAIMER. Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or completeness of the information provided herein and takes no liabilities for the consequences of use of such information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes to such information at any time without further notice. This document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third party's intellectual property rights. LIFE SUPPORT POLICY. Alpha AND Omega Semiconductor PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL. COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or 2. A critical component in any component of a life systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness.

10 Reasonably expected to result in a significant injury of the user. Rev. July 2013 Page 8 of 8.