CC1121 High-Performance Low-Power RF Transceiver …

1 Product Sample & Technical Tools & Support &. Folder Buy Documents Software Community CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014. CC1121 High-Performance Low-Power RF Transceiver 1 Device Overview 1. Features High-Performance , Single-Chip Transceiver Automatic Output power Ramping Excellent Receiver Sensitivity: Configurable Data Rates: to 200 kbps 120 dBm at kbps Supported Modulation Formats: 2-FSK, 110 dBm at 50 kbps 2-GFSK, 4-FSK, 4-GFSK, MSK, OOK. Blocking performance : 86 dB at 10 MHz RoHS-Compliant 5-mm x 5-mm No-Lead QFN 32- Adjacent Channel Selectivity: 60 dB Pin Package (RHB). Very Low Phase Noise: 111 dBc/Hz at Regulations Suitable for Systems Targeting 10-kHz Offset Compliance With Separate 128-Byte RX and TX FIFOs Europe: ETSI EN 300 220, ETSI EN 54-25. WaveMatch: Advanced Digital Signal Processing US: FCC CFR47 Part 15, FCC CFR47 Part 24. for Improved Sync Detect performance Japan: ARIB STD-T108.

2 Support for Seamless Integration With the CC1190 Peripherals and Support Functions Device for Increased Range Giving up to 3-dB Enhanced Wake-On-Radio Functionality for Improvement in Sensitivity and up to +27-dBm Automatic Low-Power Receive Polling Output power Includes Functions for Antenna Diversity power Supply Support Wide Supply Voltage Range ( V to V) Support for Retransmissions Low Current Consumption: Support for Auto-Acknowledge of Received RX: 2 mA in RX Sniff Mode Packets RX: 17-mA Peak Current in Low-Power TCXO Support and Control, also in power Mode Modes RX: 22-mA Peak Current in high - Automatic Clear Channel Assessment (CCA) for performance Mode Listen-Before-Talk (LBT) Systems TX: 45 mA at +14 dBm Built-in Coding Gain Support for Increased power Down: A ( A With eWOR Range and Robustness Timer Running) Digital RSSI Measurement Programmable Output power up to +16 dBm With Temperature Sensor Step Size Applications Ultra-Low power Wireless Systems With Channel IEEE Systems Spacing Down to 50 kHz Home and Building Automation 169-, 315-, 433-, 868-, 915-, 920-, 950-MHz Wireless Alarm and Security Systems ISM/SRD Band Systems Industrial Monitoring and Control Wireless Metering and Wireless Smart Grid (AMR Wireless Healthcare Applications and AMI).

3 Wireless Sensor Networks and Active RFID. 1. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014 Description The CC1121 device is a fully integrated single-chip radio Transceiver designed for high performance at very Low-Power and low-voltage operation in cost-effective wireless systems. All filters are integrated, thus removing the need for costly external SAW and IF filters. The device is mainly intended for the ISM. (Industrial, Scientific, and Medical) and SRD (Short Range Device) frequency bands at 274 320 MHz, 410 480 MHz, and 820 960 MHz. The CC1121 device provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and Wake-On-Radio.

4 The main operating parameters of the CC1121 device can be controlled through an SPI interface. In a typical system, the CC1121 device will be used with a microcontroller and only a few external passive components. Device Information (1). PART NUMBER PACKAGE BODY SIZE. CC1121 RHB VQFN (32) mm x mm (1) For more information, see Section 8, Mechanical Packaging and Orderable Information Functional Diagram Figure 1-1 shows the system block diagram of the CC1121 device. CC112X. MARC CSn (chip select). SPI. (optional 32kHz Ultra low power 32kHz 4k byte Main Radio Control Unit power on reset Serial configuration clock intput) auto-calibrated RC oscillator ROM Ultra low power 16 bit and data interface MCU. SI (serial input). System bus Interrupt and SO (serial output). IO handler SCLK (serial clock). eWOR 256 byte Battery sensor / Configuration and Packet handler Enhanced ultra low power FIFO RAM. temp sensor status registers and FIFO control (optional GPIO0-3).

5 Wake On Radio timer buffer RF and DSP frontend Output power ramping and OOK / ASK modulation (optional autodetected external XOSC / TCXO). 14dBm high I. XOSC_Q1. Modulator PA. efficiency PA Fully integrated Fractional-N Data interface with XOSC. Frequency Synthesizer signal chain access Q XOSC_Q2. 90dB dynamic LNA_P ifamp range ADC (optional bit clock). Channel Cordic Highly flexible FSK / OOK. filter high linearity LNA demodulator (optional low jitter serial 90dB dynamic data output for legacy LNA_N ifamp range ADC protocols). AGC. (optional GPIO for Automatic Gain Control, 60dB VGA range antenna diversity) RSSI measurements and carrier sense detection Figure 1-1. Functional Block Diagram 2 Device Overview Copyright 2011 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1121 . CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014. Table of Contents 1 Device Overview .. 1 32-kHz Clock Input.

6 17. Features .. 1 32-kHz RC Oscillator .. 17. Applications .. 1 I/O and Reset .. 17. Description .. 2 Temperature Sensor .. 17. Functional Diagram .. 2 Typical Characteristics .. 18. 2 Revision History .. 4 5 Detailed Description .. 20. 3 Terminal Configuration and Functions .. 5 Block 20. Pin 5 Frequency Synthesizer .. 20. Pin Configuration .. 6 Receiver .. 21. 4 Specifications .. 7 Transmitter .. 21. Absolute Maximum Ratings .. 7 Radio Control and User Interface .. 21. Handling Ratings .. 7 Enhanced Wake-On-Radio (eWOR) .. 21. Recommended Operating Conditions (General Sniff Mode .. 22. Characteristics) .. 7 Antenna Diversity .. 22. Thermal Resistance Characteristics for RHB. Low-Power and High-Performance 22. Package .. 7. WaveMatch .. 23. RF Characteristics .. 8. 6 Typical Application Circuit .. 24. Regulatory Standards .. 9. 7 Device and Documentation Support .. 25. Current Consumption, Static Modes .. 9.

7 Device Support .. 25. Current Consumption, Transmit Modes .. 9. Documentation Support .. 26. Current Consumption, Receive 10. Community Resources .. 26. Receive 11. 26. Transmit Parameters .. 14. Electrostatic Discharge Caution .. 26. PLL Parameters .. 15. Glossary .. 26. Wake-up and Timing .. 16. 8 Mechanical Packaging and Orderable 32-MHz Crystal Oscillator .. 16. Information .. 27. 32-MHz Clock Input (TCXO) .. 16. Copyright 2011 2014, Texas Instruments Incorporated Table of Contents 3. Submit Documentation Feedback Product Folder Links: CC1121 . CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. This data manual revision history highlights the changes made to the SWRS111E device-specific data manual to make it an SWRS111F revision. Changes from Revision E (July 2014) to Revision F Page Added Ambient to the temperature range condition and removed Tj from Temperature range.

8 7. Added data to TCXO table .. 16. 4 Revision History Copyright 2011 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1121 . CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014. 3 Terminal Configuration and Functions Pin Diagram Figure 3-1 shows pin names and locations for the CC1121 device. 25 AVDD_PFD_CHP. 26 DCPL_PFD_CHP. 27 AVDD_SYNTH2. 28 AVDD_XOSC. DCPL_XOSC. 32 EXT_XOSC. XOSC_Q2. 30 XOSC_Q1. 29. 31. VDD_GUARD 1 24 LPF1. RESET_N 2 23 LPF0. GPIO3 3 22 AVDD_SYNTH1. GPIO2 4 21 DCPL_VCO. DVDD 5 CC1121 20 LNA_N. DCPL 6 19 LNA_P. SI 7 GND 18 TRX_SW. GROUND PAD. SCLK 8 17 PA. 15. 16. 14. 10. 13. 11. 12. 9. DVDD. AVDD_IF. RBIAS. SO (GPIO1). GPIO0. CSn AVDD_RF. Figure 3-1. Package 5-mm 5-mm QFN. Copyright 2011 2014, Texas Instruments Incorporated Terminal Configuration and Functions 5. Submit Documentation Feedback Product Folder Links: CC1121 . CC1121 . SWRS111F JUNE 2011 REVISED OCTOBER 2014 Pin Configuration The following table lists the pinout configuration for the CC1121 device.

9 PIN NO. PIN NAME TYPE / DIRECTION DESCRIPTION. 1 VDD_GUARD power V VDD. 2 RESET_N Digital input Asynchronous, active-low digital reset 3 GPIO3 Digital I/O General-purpose I/O. 4 GPIO2 Digital I/O General-purpose I/O. 5 DVDD power V VDD to internal digital regulator 6 DCPL power Digital regulator output to external decoupling capacitor 7 SI Digital input Serial data in 8 SCLK Digital input Serial data clock 9 SO(GPIO1) Digital I/O Serial data out (general-purpose I/O). 10 GPIO0 Digital I/O General-purpose I/O. 11 CSn Digital Input Active-low chip select 12 DVDD power V VDD. 13 AVDD_IF power V VDD. 14 RBIAS Analog External high -precision R. 15 AVDD_RF power V VDD. 16 Not connected 17 PA Analog Single-ended TX output (requires DC path to VDD). TX and RX switch. Connected internally to GND in TX and floating ( high - 18 TRX_SW Analog impedance) in RX. 19 LNA_P Analog Differential RX input (requires DC path to GND).

10 20 LNA_N Analog Differential RX input (requires DC path to GND). 21 DCPL_VCO power Pin for external decoupling of VCO supply regulator 22 AVDD_SYNTH1 power V VDD. 23 LPF0 Analog External loop filter components 24 LPF1 External loop filter components 25 AVDD_PFD_CHP power V VDD. 26 DCPL_PFD_CHP power Pin for external decoupling of PFD and CHP regulator 27 AVDD_SYNTH2 power V VDD. 28 AVDD_XOSC power V VDD. 29 DCPL_XOSC power Pin for external decoupling of XOSC supply regulator Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock 30 XOSC_Q1 Analog connected to EXT_XOSC is used). Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock 31 XOSC_Q2 Analog connected to EXT_XOSC is used). Pin for external XOSC input (must be grounded if a regular XOSC connected 32 EXT_XOSC Digital input to XOSC_Q1 and XOSC_Q2 is used). GND Ground pad The ground pad must be connected to a solid ground plane.