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CMOS image sensor fabrication technologies Pixel design ...

LectureNotes5 CMOSI mageSensor DeviceandFabrication cmos imagesensor fabricationtechnologies Pixeldesignandlayout Imagingperformanceenhancementtechniques Technologyscaling,industrytrends Microlens Color lterarrayEE392B:DeviceandFabrication5-1 ModernCMOSD eviceStructureEE392B:DeviceandFabricatio n5-2 ImagingIs Di erentfromDigitalLogicFeaturesDigitalLogi cImagingSilicideImprovescontactresistanc eAbsorbslight{ low photosensitivityIncreasedjunctionleakage STIE nablestighterdesignrulesLeadsto largerdark currentduetodefectsfromstressShallow junctionReducesshort-channele ectReducesquantume ciencyformediumto longwavelengthlightLower power supplyvoltageReducespower consumption.}

Most CMOS image sensors uses 0.18 m CMOS 3.3V, thick oxide transistors for the pixel Pinned photodiode for CMOS image sensors (at low voltage) Cu backend to reduce dielectric stack height Migration to 0.13 m CMOS may need substantial process changes Pixel size reduction to 2 m driven mostly by cost EE 392B: Device and Fabrication 5-35

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Transcription of CMOS image sensor fabrication technologies Pixel design ...

1 LectureNotes5 CMOSI mageSensor DeviceandFabrication cmos imagesensor fabricationtechnologies Pixeldesignandlayout Imagingperformanceenhancementtechniques Technologyscaling,industrytrends Microlens Color lterarrayEE392B:DeviceandFabrication5-1 ModernCMOSD eviceStructureEE392B:DeviceandFabricatio n5-2 ImagingIs Di erentfromDigitalLogicFeaturesDigitalLogi cImagingSilicideImprovescontactresistanc eAbsorbslight{ low photosensitivityIncreasedjunctionleakage STIE nablestighterdesignrulesLeadsto largerdark currentduetodefectsfromstressShallow junctionReducesshort-channele ectReducesquantume ciencyformediumto longwavelengthlightLower power supplyvoltageReducespower consumption.}

2 EnablesdevicescalingReducesheadroomfor signalswingLower thresholdvoltageImprovesdrivecurrentIncr easessubthresholdleakageThingateoxideEna blesdevicescalingtoshorterchannellengthI ncreasesgateleakageMultiplelevelsof interconnectImproveswire-abilityIncrease sdistancefrommicrolensorcolor lterto photodetectorEE392B:DeviceandFabrication 5-3 BaselineModi cationsof CMOSfor ImagingModi cationsare generallyneededonlyin thepixelarea Modi cationsto improveopticalperformance: Non-silicidedsource/drainfor photodiode andPolySigateforphotogate Deeper n-well to p-substratediode for improvedquantume ciency Episubstratethicknessoptimizationfor quantume ciency, spectraltailoringandcrosstalkoptimizatio n Customizeddielectriclayersto reducere ectionfrommaterialwithmis-matchedrefract iveindex Reducedmetallightshieldheight,tight(vert icalandhorizontal)lightshieldEE392B:Devi ceandFabrication5-4 Modi cationsto reducedark current: Avoidlandedcontacts,minimizegateedge,iso lationedge GentleSTIprocessanddefectrepair/avoidanc earoundSTI Modi cationsto in-pixeltransistors.

3 Thicker gateoxideto handlehigherpixel(analog)power supply AdjustvTto maximizesignalswingandminimizeleakage Longerthanminimumgatelengthto reducehot-carrierinducedphotonemissionan dimpactionizationEE392B:DeviceandFabrica tion5-5 ExampleCMOSI mageSensor Cross-SectionH. Rhodeset al.,\ cmos imagertechnologyshrinksandimageperforman ce,"IEEEW orkshoponMicroelectronicsandElectronDevi ces, (2004)EE392 al.,\ m cmos color imagertechnologywithnon-silicidesource/d rainpixel," , (2000) Wong,\TechnologyandDeviceScalingConsider ationsfor CMOSI magers," (1996)EE392B:DeviceandFabrication5-7 Non-SilicidedSource/Drain Silicideconsumessilicon,causesstressandl argerleakage(cornerleakage) N-well to p-substratediode al.

4 ,\Nonsilicidesource/drainpixelfor m cmos imagesensor,"IEEEE lectronDeviceLetters., (2001)EE392B:DeviceandFabrication5-8N-We ll to P-SubstratePhotodiode Higherquantume ciencydueto deeper al.,\ m cmos color imagertechnologywithnon-silicidesource/d rainpixel," , (2000)EE392B:DeviceandFabrication5-9N-We ll to P-SubstratePhotodiode UnderSTI Deep( m)n-well (MeV)implant,lightdose al.,\Ahighperformanceactivepixelsensor m cmos color imagertechnology," , (2001)EE392B:DeviceandFabrication5-10 EpiSubstrateThicknessTailoring P+-substrate(more costly)cutsdownoncarrierdi usiondueto redandinfra-redlightbecausedi usionlengthin heavilydoped semiconductor isshort Typicalp-epionp+-substrateis<2 m,notdeepenoughfor goodgreen/redlightabsorption Epi-layer too et al.

5 ,\Highsensitivity andno-crosstalkpixeltechnologyfor embeddedCMOS imagesensor," , (2001)EE392B:DeviceandFabrication5-11 CustomizedBack-EndDielectrics Gradetherefractiveindex,matchrefractivei ndexat boundariesas far aspossible Dielectrics:Si3N4, PECVD oxide,silicon-richoxide,SiO2, PECVD nitride Make suredielectricsare et al.,\Highsensitivity andno-crosstalkpixeltechnologyfor embeddedCMOS imagesensor," , (2001)EE392B:DeviceandFabrication5-12 DielectricThicknessOptimization Wavelengthdependentdueto multiplere et al.,\Highsensitivity andno-crosstalkpixeltechnologyfor embeddedCMOS imagesensor," , (2001)EE392 et al.

6 ,\Highsensitivity andno-crosstalkpixeltechnologyfor embeddedCMOS imagesensor," , (2001)EE392B:DeviceandFabrication5-14 Lower et al.,\Highsensitivity andno-crosstalkpixeltechnologyfor embeddedCMOS imagesensor," , (2001)EE392B:DeviceandFabrication5-15 OpticalPathOptimizationat theBackend Utilizedi erentdielectricrefractiveindexto achievetotalinternalre ection Snell'slaw:n1sin 1=n2sin al.,\Lightguidefor pixelcrosstalkimprovementin deepsubmicronCMOS imagesensor,"IEEEE lectronDeviceLetters, (2004)EE392B:DeviceandFabrication5-16 OpticalPathOptimizationat al.,\Lightguidefor pixelcrosstalkimprovementin deepsubmicronCMOS imagesensor,"IEEEE lectronDeviceLetters, (2004)EE392B:DeviceandFabrication5-17 AirGapGuard Ring Anextensionof thetotalinternalre al.

7 ,\Dramaticreductionof opticalcrosstalkin deep-submicrometerCMOS imagerwithairgapguardring,"IEEEE lectronDeviceLetters, (2004)EE392B:DeviceandFabrication5-18 LeakageCurrent Chargeleakagefromhighimpedancenode duringsignalintegrationorreadout Sources: Di usioncurrent(proportionalton2i) Generationcurrentin spacechargeregion(proportionaltoni) PNjunctiontunnelingcurrent(bandto bandtunneling) O -current{ subthresholdconductiondueto lowvT Gatecurrent{ importantat<130nmnode Hot-carriere ects{ presentfor transistors operatedin thesaturationregion Defectgeneratedleakage{ processstress(strainedsilicon,STI,silici de,contactetch)EE392 Wong,\TechnologyandDeviceScalingConsider ationsfor CMOSI magers," (1996)EE392B:DeviceandFabrication5-20 HotCarriers Carriersgainenergyas theytravelalongthechannel Whyare carrierscalled\hot"carriers?}}}}

8 Theenergyof thecarrierscanbe described by a carrierdistributioncharacterizedby a \temperature"thatis higherthanthelatticetemperature,hencethe term\hot"carriers Two maine ectscausedby hot-carriers Impactionization,generateselectron-holep airs PhotonemissionEE392B:DeviceandFabricatio n5-21 DeviceIn SaturationRegionWillEmitLightJ. C. Tsang,J. A. Kash, Vallett,IBMJ. ResearchandDevelopment, ,p. 583(2000)EE392B:DeviceandFabrication5-22 Hot-CarrierInducedPhotonEmission Intra-band(conductionband)transition{ onlyfor nFETs Photonsgeneratedin theinfra-redwavelengths Photonstravelquitefar in thesiliconsubstrate PNjunctionguard ringis note ectivein isolatingpixelfromphotons PNjunctionguard ringis usefulto block electronsfromimpactionizationEE392B:Devi ceandFabrication5-23 OptimizedSTIP rocess GentleSTIetch ReduceSTIdielectricstress(engineerthelin er)induceddefects(stackingfaults) Implantp+doped regionaroundSTIto pushelectronsaway fromSTIsurfaceEE392B.}

9 DeviceandFabrication5-24 Transistor design Pixeltransistors HighvDDto providesignalswingheadroom Thickoxideto handlehighervDDandreducegateleakage BoostedResetGatevoltagefor hard reset Avoidhot-carriergenerationusinglongertha nminimumdevices vTadjustments HighervTfor resettransistor LowervTfor sourcefollower transistor Peripheraltransistors Standard cmos logictransistors to reducepower consumptionandattainhighcircuitspeed Similar strategyas DRAM Separate\array" transistors,and\support circuit"transistorsEE392B:DeviceandFabri cation5-25 PixelLayoutandPixelSize Pixelsizemostlydeterminedby Contactsize Poly-gateto contactspacing Metalto metalspacing 20 Ffor 4 Tcell 13-16 Ffor 3 TcellEE392B:DeviceandFabrication5-26 PixelLayoutExamples{ 3 TPhotodiode Maximumphotodiode areamay notgivethebestimagingperformance Leakage,conversiongainA.}

10 I. Krymski,N. E. Bock,N. Tu, Blerkom,andE. R. Fossum,\Ahigh-speed,240-frames/s, ," , , ,January 2003I. Shcherback, ,\Photoresponseanalysisandpixelshape optimizationfor cmos activepixelsensors," , (2003)EE392B:DeviceandFabrication5-27 PixelLayoutExamples{ 4T-PhotogateS. K. Mendis,S. E. Kemeny, R. C. Gee,B. Pain,C. , ,andE. R. Fossum,\ cmos activepixelimagesensors for highlyintegratedimagingsystems,"IEEEJ ournalof Solid-StateCircuits, , ,February 1997EE392B:DeviceandFabrication5-28 TechnologyScaling Today'sadvancedCMOS imagesensors are fabricatedin m cmos Mostadvancedlogictechnologyis 90 nm(willbe 65 nmin 2006) CanCMOS imagesensor usenanometerscaleCMOS technologies ?}


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